FS6500 datasheet(10/153 Pages) NXP

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NXP Semiconductors

FS6500-FS4500-ASILD

Safety power system basis chip with CAN FD and LIN transceivers

number

Pin name

Type

Definition

parallel to the one used to set the VCORE voltage). If not used, this pin must be

connected directly to FB_CORE.

FS0B

D_OUT

First output of the safety block (active low). The pin is asserted low at start-up and

when a fault condition is detected. Open drain structure.

DEBUG

D_IN

Debug mode entry input

AGND

GROUND

Analog ground connection

MUX_OUT

A_OUT

Multiplexed output to be connected to a MCU ADC. Selection of the analog

parameter is available at MUX-OUT through the SPI.

IO_2:3

D_IN

Digital input pin with wake-up capability (logic level compatible)

Digital input: Pin status can be read through the SPI. Can be used to monitor

FCCU error signals from MCU for safety purposes.

Wake-up capability: Can be selectable to wake-up on edges or levels.

TXD

D_IN

Transceiver input from the MCU which controls the state of the CAN-bus. Internal

pull-up to VDDIO.

If CAN function is not used, this pin must be left open.

RXD

D_OUT

Receiver output which reports the state of the CAN-bus to the MCU

If CAN function is not used, this pin must be left open.

TXDL

D_IN

Transceiver input from the MCU controlling the state of the LIN bus. Internal pull-up

to VDDIO.

or VPU_FS A_OUT

Pull-up output for FS1B function.

LIN and FS1B functions are exclusive. The differentiation is made by part numbers. When LIN is available, FS1B

is not, and vice versa.

If neither LIN, nor FS1B functions are used, this pin must be left open.

RXDL

D_OUT

Receiver output reporting the state of the LIN bus to the MCU.

If LIN function is not used, this pin must be left open.

RSTB

D_OUT

This output is asserted low when the safety block reports a failure. The main

function is to reset the MCU. Reset input voltage is also monitored in order to detect

external reset and fault condition. Open drain structure.

MISO

D_OUT

SPI bus. primary input secondary output

MOSI

D_IN

SPI bus. primary output secondary input

SCLK

D_IN

SPI Bus. Serial clock

NCS

D_IN

Not chip select (active low)

INTB

D_OUT

This output pin generates a low pulse when an Interrupt condition occurs. Pulse

duration is configurable. Internal pull-up to VDDIO.

VDDIO

A_IN

Input voltage for MISO output buffer. Allows voltage compatibility with MCU I/Os.

SELECT

D_IN

Hardware selection pin for VAUX and VCCA output voltages

FB_CORE

A_IN

VCORE voltage feedback. Input of the error amplifier.

COMP_

CORE

A_OUT

Compensation network. Output of the error amplifier.

For FS4500 series, this pin must be left open (NC).

VCORE_

SNS

A_IN

VCORE input voltage sense

Table 3. FS6500/FS4500 pin definition...continued

FS6500-FS4500-ASILD

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 8 — 5 August 2024

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