FS6500 datasheet(40/153 Pages) NXP

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NXP Semiconductors

FS6500-FS4500-ASILD

Safety power system basis chip with CAN FD and LIN transceivers

12.5 Fail-safe machine

To fulfill safety critical applications, the FS6500/FS4500 integrates a dedicated fail-safe machine (FSM). The

FSM is composed of three main sub-blocks: the voltage supervisor (VS), the fail-safe state machine (FSSM),

and the fail-safe output driver (FSO).The FSM is electrically independent from the rest of the circuitry, to avoid

common cause failure.

For this reason, the FSM has its own voltage regulators (analog and digital), dedicated band gap, and its

own oscillator. Three power supply pins (VSUP 1, 2, and 3) are used to overtake a pin lift issue. The internal

voltage regulators are directly connected on VSUP (one bonding wire per pin is used). Additionally, the ground

connection is redundant as well to avoid any loss of ground.

All the voltages generated in the device are monitored by the voltage supervisor (under and overvoltage) owing

to a dedicated internal voltage reference (different from the one used for the voltage regulators). The result is

reported to the MCU through the SPI and delivered to the fail-safe state machine (FSSM) for action, in case of

a fault. All the safety relevant signals feed the FSSM, which handles the error handling and controls the fail-safe

outputs.

There are three fail-safe outputs: RSTB (asserted low to reset the MCU), FS0B, and FS1B (asserted low to

control any fail-safe circuitry). The fail-safe machine is in charge of bringing and maintaining the application in a

fail-safe state.

FS6500-FS4500-ASILD

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 8 — 5 August 2024

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