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ISM330BX датащи(PDF) 92 Page - STMicroelectronics |
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ISM330BX датащи(HTML) 92 Page - STMicroelectronics |
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92 / 150 page ![]() 9.61 TDM_CFG0 (6Ch) TDM configuration register 0 (R/W) Table 163. TDM_CFG0 register 1(1) TDM_ DELAYED_CFG TDM_BCLK _EDGE_SEL TDM_ SLOT_SEL 0(2) TDM_ WCLK_1 TDM_ WCLK_0 TDM_WCLK _BCLK_SEL 1. This bit must be set to 1 for the correct operation of the device. 2. This bit must be set to 0 for the correct operation of the device. Table 164. TDM_CFG0 register description TDM_DELAYED_CFG Enables TDM delayed configuration. Default value: 0 (0: disabled; 1: enabled) TDM_BCLK_EDGE_SEL BCLK edge selection for TDM interface. Default value: 0 (0: sampling on BCLK rising edge; 1: sampling on BCLK falling edge) TDM_SLOT_SEL Selection of TDM slot for transmission. Default value: 0 (0: slot {0, 1, 2} is selected; 1: slot {4, 5, 6} is selected) TDM_WCLK_[1:0] TDM word clock frequency selection (see Table 165) TDM_WCLK_BCLK_SEL Selection of cross association between WCLK and BCLK frequencies (see Table 165) Table 165. WCLK and BCLK frequencies TDM_WCLK_[1:0] TDM_WCLK_BCLK_SEL WCLK BCLK 01 0 16 kHz 2048 kHz 00 1 8 kHz 2048 kHz ISM330BX Register description DS14588 - Rev 2 page 92/150 |
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