ADIS16501SLASHPCBZ datasheet(37/45 Pages) AD

37 / 45 page

Data Sheet

ADIS16501

USER REGISTER DEFINITIONS

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Rev. B | 37 of 45

Table 100. ZA_BIAS_HIGH Register Definition

Addresses

Default

Access

Flash Backup

0x56, 0x57

0x0000

R/W

Yes

Table 101. ZA_BIAS_HIGH Bit Definitions

Bits

Description

[15:0]

Z-axis accelerometer offset correction, upper word

The ZA_BIAS_LOW (see Table 98 and Table 99) and ZA_BIAS_

HIGH (see Table 100 and Table 101) registers combine to allow

users to adjust the bias of the z-axis accelerometers. The data

format examples in Table 28 also apply to the ZA_BIAS_HIGH reg-

ister, and the data format examples in Table 29 apply to the 32-bit

combination of the ZA_BIAS_LOW and ZA_BIAS_HIGH registers.

These registers influence the z-axis accelerometer measurements

in the same manner that the XA_BIAS_LOW and XA_BIAS_HIGH

registers influence the x-axis accelerometer measurements (see

Figure 57).

Filter Control Register (FILT_CTRL)

Table 102. FILT_CTRL Register Definition

Addresses

Default

Access

Flash Backup

0x5C, 0x5D

0x0000

R/W

Yes

Table 103. FILT_CTRL Bit Definitions

Bits

Description

[15:3]

Reserved

[2:0]

Filter Size Variable B, number of taps in each stage, N = 2B

The FILT_CTRL register (see Table 102 and Table 103) provides

user controls for the Bartlett window FIR filter (see Figure 31),

which contains two cascaded averaging filters. For example, use

the following sequence to set Register FILT_CTRL, Bits[2:0] =

0100, which sets each stage to have 16 taps: 0xCC04 and 0xCD00.

Figure 58 provides the frequency response for several settings in

the FILT_CTRL register.

Figure 58. Bartlett Window, FIR Filter Frequency Response (Phase Delay = N

Samples)

Range Identifier (RANG_MDL)

Table 104. RANG_MDL Register Definition

Addresses

Default

Access

Flash Backup

0x5E, 0x5F

Not applicable

Table 105. RANG_MDL Bit Definitions

Bits

Description

[15:3]

Reserved

[3:2]

Gyroscope measurement range

00 = not used

01 = ±500°/sec (ADIS16501)

10 = not used

11 = not used

[1:0]

Not used, binary value = 11

Miscellaneous Control Register (MSC_CTRL)

Table 106. MSC_CTRL Register Definition

Addresses

Default

Access

Flash Backup

0x60, 0x61

0x00C1

R/W

Yes

Table 107. MSC_CTRL Bit Definitions

Bits

Description

[15:10]

Reserved

BURST32. 32-bit burst enable bit. The user must wait until a full data

ready cycle until the burst array updates with the desired data type.

1 = 32-bit burst data.

0 = 16-bit burst data (default).

BURST_SEL. Burst read output array selection. This bit controls

what calibrated data is in a burst read.

1 = burst data has delta angle and delta velocity data (default).

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