ADIS16501SLASHPCBZ datasheet(31/45 Pages) AD

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Data Sheet

ADIS16501

USER REGISTER DEFINITIONS

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Rev. B | 31 of 45

The Y_ACCL_LOW (see Table 34 and Table 35) and Y_ACCL_

OUT (see Table 36 and Table 37) registers contain the accelerome-

ter data for the y-axis.

Z-Axis Accelerometer (Z_ACCL_LOW and

Z_ACCL_OUT)

Table 38. Z_ACCL_LOW Register Definition

Addresses

Default

Access

Flash Backup

0x18, 0x19

Not applicable

Table 39. Z_ACCL_LOW Bit Definitions

Bits

Description

[15:0]

Z-axis accelerometer data, additional resolution bits

Table 40. Z_ACCL_OUT Register Definition

Addresses

Default

Access

Flash Backup

0x1A, 0x1B

Not applicable

Table 41. Z_ACCL_OUT Bit Definitions

Bits

Description

[15:0]

Z-axis accelerometer data, high word, twos complement, ±14 g range,

0 g = 0x0000, 1 LSB = 1.25 mg

The Z_ACCL_LOW (see Table 38 and Table 39) and Z_ACCL_

OUT (see Table 40 and Table 41) registers contain the accelerome-

ter data for the z-axis.

INTERNAL TEMPERATURE (TEMP_OUT)

Table 42. TEMP_OUT Register Definition

Addresses

Default

Access

Flash Backup

0x1C, 0x1D

Not applicable

Table 43. TEMP_OUT Bit Definitions

Bits

Description

[15:0]

Temperature data, twos complement, 1 LSB = 0.1°C, 0°C = 0x0000

The TEMP_OUT register (see Table 42 and Table 43) provides a

coarse measurement of the temperature inside of the ADIS16501.

This data is most useful for monitoring relative changes in the

thermal environment.

Table 44. TEMP_OUT Data Format Examples

Temperature (°C)

Decimal

Hex

Binary

+105

+1050

0x041A

0000 0100 0001 1010

+25

+250

0x00FA

0000 0000 1111 1010

+0.2

0x0002

0000 0000 0000 0010

+0.1

0x0001

0000 0000 0000 0001

0x0000

0000 0000 0000 0000

−0.1

−1

0xFFFF

1111 1111 1111 1111

−0.2

−2

0xFFFE

1111 1111 1111 1110

−40

−400

0xFE70

1111 1110 0111 0000

TIME STAMP (TIME_STAMP)

Table 45. TIME_STAMP Register Definition

Addresses

Default

Access

Flash Backup

0x1E, 0x1F

Not applicable

Table 46. TIME_STAMP Bit Definitions

Bits

Description

[15:0]

Time from the last pulse on the SYNC pin, offset binary format, 1

LSB = 49.02 µs

The TIME_STAMP register (see Table 45 and Table 46) works

with scaled sync mode (Register MSC_CTRL, Bits[3:2] = 10, see

Table 107). The 16-bit number in TIME_ STAMP contains the time

associated with the last sample in each data update relative to

the most recent edge of the clock signal in the SYNC pin. For

example, when the value in the UP_SCALE register (see Table

109) represents a scale factor of 20, DEC_RATE = 0, and the

external SYNC rate = 100 Hz, the following time stamp sequence

results: 0 LSB, 10 LSB, 20 LSB, 30 LSB, 40 LSB, 50 LSB, 61 LSB,

71 LSB, … , 193 LSB for the 20th sample, which translates to 0 µs,

490 µs, … , 9460 µs, the time from the first SYNC edge.

DATA UPDATE COUNTER (DATA_CNTR)

Table 47. DATA_CNTR Register Definition

Addresses

Default

Access

Flash Backup

0x22, 0x23

Not applicable

Table 48. DATA_CNTR Bit Definitions

Bits

Description

[15:0]

Data update counter, offset binary format

When the ADIS16501 goes through its power-on sequence or when

it recovers from a reset command, DATA_CNTR (see Table 47 and

Table 48) starts with a value of 0x0000 and increments every time

new data loads into the output registers. When the DATA_CNTR

value reaches 0xFFFF, the next data update causes it to wrap back

around to 0x0000 where it continues to increment every time new

data loads into the output registers.

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