Datasheet

13

002-37178 Rev. *B

2023-10-10

EZ-PD™ PAG2S-PS integrated USB PD and

synchronous-rectification controller

Functional description

Figure 6

SR_SEN and SR_GDRV in CCM mode

The voltage at the drain node of the external NFET is sensed on the SR_SEN pin connected via an external resistor.

The external resistor is needed to restrict voltage at the SR_SEN pin below 34 V. The external resistance on the

SR_SEN pin depends on the turns ratio of the power transformer. Table 3 provides the external resistor values

required for different turns ratio.

Table 3

External resistance on SR_SEN vs turns ratio

Primary: Secondary turns ratio

Rext (Ohms)

3:1

20k

4:1

20k

5:1

20k

6:1

12k

7:1

12k

8:1

12k

9:1

12k

10:1

12k

11:1

12k

12:1

12k

13:1

12k

14:1

12k

15:1

12k

Time

Primary Current

Secondary Current

SR_SEN

Primary FET ON,

SR FET OFF

Primary FET OFF,

SR FET ON

Negative sense

detect

SR_GDRV

CCM turn-off point