Datasheet

Please read the Important Notice and Warnings at the end of this document

002-37178 Rev. *B

www.infineon.com

page 1

2023-10-10

CYPAS213

EZ-PD™ PAG2S-PS integrated USB PD and

synchronous-rectification controller

General description

EZ-PD™ PAG2S-PS CYPAS213 is an integrated secondary-side controller with USB Power Delivery controller and

synchronous-rectifier. EZ-PD™ PAG2S-PS is targeted towards USB-C power adapters, it fits well into

high-efficiency AC-DC flyback designs with USB Power Delivery, Qualcomm Quick Charge, and other standard

charging protocols. EZ-PD™ PAG2S-PS also supports USB Power Delivery Extended Power Range (EPR) mode.

Applications

• USB-C chargers and adapters

• USB-C chargers and adapters with EPR

• Power adapters supporting both USB PD and legacy charging

Features

• Integrates secondary-side synchronous rectifier (SR) controller and charging port controller. SR controller has

a turn-on propagation delay of typical 40 ns and a turn-off propagation delay of typical 25 ns.

• Supports synchronous rectification in quasi-resonant (QR), critical conduction mode (CrCM), discontinuous

conduction mode (DCM), and continuous conduction code (CCM) and supports switching frequency up to

300 kHz

• SR driver works with both standard MOSFET and logic level MOSFET

• SR driver supports differentiation between primary turn-on versus resonance oscillation to avoid false turn-on

of SR gate-driver

• USB PD 3.1 compliant with extended power range (EPR) support of up to 28 V VBUS

• Supports USB PD 2.0, PD 3.0 with programmable power supply (PPS), QC5.0, QC4+, QC 4.0, QC 3.0, QC 2.0,

Samsung AFC, Apple Charging, and Battery Charging (BC) V1.2 charging protocols

• Integrates low-side current sense amplifier (LSCSA), 2x VBUS discharge FETs, and an NFET gate driver to drive

the load switch and VCONN FETs to support EMCA cables

• Configurable VBUS overvoltage protection (OVP), undervoltage protection (UVP), overcurrent protection (OCP),

short-circuit protection (SCP), and system overtemperature protection (OTP)

• Protects against accidental VBUS to CC short; electrostatic discharge (ESD) protection on CC, VBUS, DP/DM

lines, and overvoltage on DP/DM lines

• Integrates a 32-bit Cortex® M0+ with 64 KB flash, 8 KB SRAM, and 64 KB ROM

• 24-pin SOIC and 32-pin QFN packages with –40°C to +150°C junction temperature range