USB3250 datasheet(37/48 Pages) SMSC

37 / 48 page

USB2.0 PHY IC

Datasheet

SMSC GT3200, SMSC USB3250

Revision 1.5 (03-24-06)

DATASHEET

Note 8.1

T0 may occur to 4ms after HS Reset T0.

Note 8.2

The SIE must assert the Chirp K for 66000 CLK60 cycles to ensure a 1ms minimum

duration.

Figure 8.3 HS Detection Handshake Timing Behavior (FS Mode)

Table 8.6 HS Detection Handshake Timing Values (FS Mode)

TIMING

PARAMETER

DESCRIPTION

VALUE

HS Handshake begins. DP pull-up enabled, HS

terminations disabled. The XCVRSELECT and

OPMODE inputs are then set for HS with bitstuffing

disabled, and TXVALID is asserted at least 5

60MHz clocks later.

0 (reference)

Device enables HS Transceiver and asserts Chirp

K on the bus.

T0 < T1 < HS Reset T0 + 6.0ms

Device removes Chirp K from the bus. 1ms

minimum width.

T1 + 1.0 ms < T2 < HS Reset

T0 + 7.0ms

Earliest time when downstream facing port may

assert Chirp KJ sequence on the bus.

T2 < T3 < T2+100µs

Chirp not detected by the device. Device reverts to

FS default state and waits for end of reset.

T2 + 1.0ms < T4 < T2 + 2.5ms

Earliest time at which host port may end reset

HS Reset T0 + 10ms

Downstream

Facing Port

Chirps

SE0

SOF

FS Mode

Device Chirp K

TXVALID

TERMSELECT

DP/DM

XCVRSELECT

OPMODE 1

OPMODE 0

time

USB3250 датащи(PDF) 37 Page - SMSC Corporation

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