USB3250 datasheet(30/48 Pages) SMSC

номер детали	USB3250

подробное описание детали	USB2.0 PHY IC

PDF	48 Pages

Scroll/Zoom	100%

производитель	SMSC [SMSC Corporation]

домашняя страница	http://www.smsc.com

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30 / 48 page

USB2.0 PHY IC

Datasheet

Revision 1.5 (03-24-06)

SMSC GT3200, SMSC USB3250

DATASHEET

Note 7.2

Figure 7.10, Figure 7.11 and Figure 7.12 are timing examples of a HS/FS Macrocell when

it is in HS mode. When a HS/FS Macrocell is in FS Mode (8-bit mode) there are

approximately 40 CLK60 cycles every byte time. The Receive State Machine assumes that

the SIE captures the data on the RXDATA bus if RXACTIVE and RXVALID are asserted.

In FS mode, RXVALID will only be asserted for one CLK60 per byte time.

Note 7.3

Figure 7.10, Figure 7.11 and Figure 7.12 the SYNC pattern on DP/DM is shown as one

byte long. The SYNC pattern received by a device can vary in length. These figures

assume that all but the last 12 bits have been consumed by the hubs between the device

and the host controller.

Figure 7.10 Receive Timing for Data (with CRC-16 in 8-bit mode)

Figure 7.11 Receive Timing for Setup Packet (8-bit mode)

CLK60

RXACTIVE

RXDATA[7:0]

RXVALID

RXERROR

DP/DM

SYNC

PID

EOP

PID

CLK60

RXACTIVE

RXDATA[7:0]

RXVALID

RXERROR

DP/DM

CRC-5 Computation

SYNC

PID

DATA

EOP

PID

DATA

USB3250 датащи(PDF) 30 Page - SMSC Corporation

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