4

I²C control interface

This section specifies the control interface. The I²C interface uses two signals: serial data line (SDA) and serial

clock line (SCL). Each device connected to the bus uses a unique address and a simple controller/target

relationship exists.

Both SDA and SCL lines are connected to a positive supply voltage using pull-up resistors located on the host.

Lines are only actively driven low. A high condition occurs when lines are floating and the pull-up resistors pull

lines up. When no data is transmitted both lines are high.

The controller device performs the clock signal (SCL) generation and initiates data transfer. The I²C bus on the

VL53L8CH has a maximum speed of 1 Mbits/s and uses a device 8-bit address of 0x52.

Figure 10. Data transfer protocol

Information is packed in 8-bit packets (bytes) always followed by an acknowledge bit, Ac for VL53L8CH

acknowledge and Am for controller acknowledge (host bus controller). The internal data is produced by sampling

SDA at a rising edge of SCL. The external data must be stable during the high period of SCL. The exceptions to

this are start (S) or stop (P) conditions when SDA falls or rises respectively, while SCL is high.

A message contains a series of bytes preceded by a start condition and followed by either a stop or repeated start

(another start condition but without a preceding stop condition) followed by another message. The first byte

contains the device address (0x52) and also specifies the data direction. If the least significant bit is low (that is,

0x52) the message is a controller-write-to-the-target. If the lsb is set (that is, 0x53) then the message is a

controller-read-from-the-target.

Figure 11. VL53L8CH I²C device address: 0x52

All serial interface communications with the Time-of-Flight sensor must begin with a start condition. The

VL53L8CH module acknowledges the receipt of a valid address by driving the SDA wire low. The state of the

read/write bit (lsb of the address byte) is stored and the next byte of data, sampled from the SDA, can be

interpreted. During a write sequence, the second byte received provides a 16-bit index, which points to one of the

internal 8-bit registers.

Figure 12. VL53L8CH data format (write)

VL53L8CH

I²C control interface

DS14310 - Rev 3

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