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MP2733 датащи(PDF) 32 Page - MPS Industries, Inc.

номер детали MP2733
подробное описание детали  Wide Input Range, 4.5A,I2C-Controlled SW Charger with NVDC Power Path and USB OTG and Enhanced ADC
PDF  51 Pages
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производитель  MPSIND [MPS Industries, Inc.]
домашняя страница  http://www.mpsind.com/index.html
Logo MPSIND - MPS Industries, Inc.

MP2733 датащи(HTML) 32 Page - MPS Industries, Inc.

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MP2733
– 4.5A SW CHARGER WITH I2C CONTROL, NVDC POWER PATH, USB OTG
MP2733 Rev. 1.1
www.MonolithicPower.com
32
5/18/2023
MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.
© 2023 MPS. All Rights Reserved.
REG02h: NTC Configuration and Thermal Regulation
Bit
Name
POR
Reset by
REG_RST
Reset
by WTD
R/W
Description
Comment
7
tSM_DLY
1
Y
Y
R/W
0: No delay
1: 10s delay
This bit sets the shipping
mode entry delay time. It is set
to 1 by default.
6
NTC_TYPE
1
Y
Y
R/W
0: Standard
1: JEITA
This bit is set to 1 by default.
5
EN_OTG_NTC
0
Y
Y
R/W
0: Disabled
1: Enabled
Enables OTG NTC. This bit is
set to 0 by default.
4
EN_CHG_NTC
1
Y
Y
R/W
0: Disabled
1: Enabled
Enables charge NTC. This bit
is set to 1 by default.
3
TJ_REG[1]
1
Y
Y
R/W
00: 60°C
01: 80°C
10: 100°C
11: 120°C
These bits set the thermal
regulation threshold. These
bits are set to 11 by default.
2
TJ_REG[0]
1
Y
Y
R/W
1
NTC_OPTION
0
Y
Y
R/W
0: Battery OTP
1: PCB OTP
NTC OTP selection bit. This
bit is set to 0 by default via the
OTP.
0
AICO_EN
0
Y
N
R/W
0: Disable AICO
1: Enable AICO
Enables
automatic
input
current optimization (AICO).
This bit is set to 0 by default.
REG03h: ADC Control and OTG Configuration
Bit
Name
POR
Reset by
REG_RST
Reset
by WTD
R/W
Description
Comment
7
ADC_START
0
Y
Y
R/W
0: Disable the ADC
1: Enable the ADC
Enables the ADC. This bit is
set to 0 by default, and is
read-only when ADC_RATE =
1. It remains high during ADC
conversion.
6
ADC_RATE
0
Y
Y
R/W
0: One-shot
conversion
1: Start continuous
conversion
This
bit
sets
the
ADC
conversion rate. It is set to 0
by default.
5
VIN_DSCHG[2]
0
Y
Y
R/W
400mV
This bit sets the On-the-Go
(OTG) voltage. The offset is
4.8V, the default is 5.0V (010),
and the range is 4.8V to 5.5V.
4
VIN_DSCHG[1]
1
Y
Y
R/W
200mV
3
VIN_DSCHG[0]
0
Y
Y
R/W
100mV
2
IIN_DSCHG[2]
0
Y
Y
R/W
000: 0.5A
001: 0.8A
010: 1.1A
011: 1.5A
100: 1.8A
101: 2.1A
110: 2.4A
111: 3.0A
These bits set the On-the-Go
(OTG) current limit. They are
set to 000 by default.
1
IIN_DSCHG[1]
0
Y
Y
R/W
0
IIN_DSCHG[0]
0
Y
Y
R/W



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