MP2733 datasheet(27/51 Pages) MPSIND

27 / 51 page

MP2733

– 4.5A SW CHARGER WITH I2C CONTROL, NVDC POWER PATH, USB OTG

MP2733 Rev. 1.1

www.MonolithicPower.com

5/18/2023

MPS Proprietary Information. Patent Protected. Unauthorized Photocopy and Duplication Prohibited.

BATTFET_DIS must be set to 0 to reset

BATTFET control.

DISC

VBATT

VSYS

tDISC_L

tDISC_H

Figure 10: Shipping Mode via the DISC Pin

On-the-Go (OTG) Boost Function

The MP2733 can supply a regulated 5V output

at the IN pin to power the peripherals. This

output is compliant with USB On-The-Go (OTG)

specifications. To ensure that the battery is not

drained, the MP2733 does not enter OTG mode

if the battery is below its under-voltage lockout

(UVLO) threshold. To enable OTG mode, the

input voltage at the IN pin must be below 1V.

Boost operation can be enabled when the

CHG_CONFIG bit = 11 (REG04h, bits[5:4] = 11)

and the OTG pin is high. The OTG output current

limit can be configured by the IIN_DSCHG bit

(REG03h, bits[1:0]). During boost mode, status

to 111.

The following conditions must be met to enable

boost operation:

• V

BATT > VBATT_UVLO_OTG (rising 3V)

• V

IN < 1V

• The OTG pin is high and CHG_CONFIG

(REG04h, bits[5:4]) is set to 11

Boost mode is enabled after a 200ms delay.

Once OTG is enabled, the MP2733 boosts the

PMID to 5V. Then the block FET (Q1) is linearly

regulated with a 3A output current limit. If VIN is

charged above 4.4V within 6ms, the block FET

fully turns on. Otherwise, the block FET turns off

and the part goes into hiccup mode. After a

600ms off period, PMID tries to charge VIN again.

The

MP2733

provides

OTG

output

short

protection. If VIN falls below 4V, the block FET

and boost turn off, and the part enters hiccup

mode. After a 600ms recovery time, OTG starts

up again. When the OTG output is short, the fault

set to 1, and an INT signal is sent to the host.

The device also provides OTG output voltage

protection. Once VIN exceeds VINOVP_DSCHG, the

MP2733 stops switching, the fault register

OTG_FAULT bit (REG0Dh, bit[6]) is set to 1, and

an INT signal is sent to the host.

In boost mode, the MP2733 employs a fixed,

1.35MHz, PWM step-up switching converter. It

switches from PWM mode to pulse-skip mode

under light-load conditions.

Analog-to-Digital Converter (ADC)

The MP2733 integrates an 8-bit analog-to-digital

converter (ADC), which is available in charge

mode, OTG mode, or battery standby mode.

In charge mode, the ADC monitors the input

voltage, input current, system voltage, battery

voltage, charge current, and NTC voltage

alternately. In OTG mode, the ADC monitors the

input voltage, input current, system voltage,

battery voltage, and NTC voltage alternately.

The ADC has two modes that can be selected by

ADC_RATE (REG03h, bit[6]). If ADC_RATE is

set

the

ADC

starts

working

once

ADC_START bit is set to 1. If ADC_RATE is set

to 1, the ADC is always working.

In battery standby mode, the ADC is available by

first setting EN_ADC_DSG (REG08h, bit[6]) to 1.

Then the ADC can be controlled by the

ADC_RATE and ADC_START bits.

Serial Interface

The IC uses an I2C-compatible interface to set

the charging parameters and instantaneously

report the device status. The I2C is a bidirectional,

two-wire serial interface. Only two bus lines are

required: a serial data line (SDA) and serial clock

line (SCL). Both the SDA and SCL lines are open

drains that must be connected to the positive

supply voltage via a pull-up resistor.

The IC operates as a slave device and receives

control inputs from the master device, such as a

microcontroller. The SCL line is always driven by

the master device. The I2C interface supports

both standard mode (up to 100kbits/s) and fast

mode (up to 400kbits/s).

All transactions begin with a start (S) condition

and are terminated by a stop (P) condition. Start

and stop conditions are always generated by the

master. A start condition is defined as a high-to-

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