CS5535 datasheet(161/555 Pages) NSC

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PMC Functional Description (Continued)

4.17.3 Software Power Management Actions

The hardware comes up from hardware system reset in the

Full On (FO) state. As part of system initialization, the

power management MSRs (see Section 5.18.1 on page

479) are written to establish the Active Hardware Clock

Gating (AHCG) state. The AHCG state is the nominal oper-

ational state.

4.17.3.1 Sleep/Standby Sequence

Entering the states under G1 and G2 requires explicit soft-

ware action. That action starts a hardware chain of events

in which some of the chain is determined by registers that

must be programmed previous to the start of the sequence.

The block diagram of the hardware involved in this

sequence is illustrated in Figure 4-53. Figure 4-54 and Fig-

ure 4-55 graphically show the Sleep/Standby sequence.

The sequence is as follows:

The “explicit software action” begins with a write to

PM1_CNT

(ACPI

I/O

Offset

08h)

starting

the

Sleep/Standby sequence.

The PMC issues a Sleep Request to the CS5535

GLCP and it passes the request as SUSP# to the GX2

GLCP.

The GX2 GLCP issues a suspend request to the pro-

cessor. After the processor has shutdown operation it

provides a suspend acknowledge back to the GX2

GLCP.

The GX2 GLCP processes a sleep sequence similar to

that described in step 5 while issuing a SUSPA# to the

CS5535 GLCP.

Figure 4-53. PMC Power Management Elements

GLIU

Activity Counters

GeodeLink Device

(1 of n)

PM MSR

GLCP

DSMI, SMI, NMI, IRQ

SUSP#

SUSPA#

Processor

Clock Control

Turn Off PCI/IDE Inputs

Turn Off PCI/IDE Outputs

External I/O

Sleep Request

Sleep Acknowledge

Internal Wakeup Events

External Wakeup and Thermal

Events including Buttons

SLEEP_X, SLEEP_Y,

SLP_CLK_EN#, WORKING,

and WORK_AUX

System Reset if

Wakeup from Standby

Power Low Indicator

PML & Reset

(with Standby power)

Notes: *At least one per GeodeLink Device.

#Global signal, one per system.

(CIS packet)

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