CS5535 datasheet(162/555 Pages) NSC

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162

Revision 0.8

PMC Functional Description (Continued)

The CS5535 GLCP processes a Sleep sequence. This

is done in one of the three ways:

a) If the CLK_DLY_EN bit in GLCP_GLB_PM (MSR

5170000Bh[1]) is 0 and the CLK_DELAY value in the

GLCP_CLK_DIS_DELAY (MSR 51700008h[23:0]) is

0, then wait until the CLK_ACTIVE flags specified in

GLCP_CLK4ACK (MSR 51700013h[33:0]) have gone

to 0.

b) If the CLK_DLY_EN bit is 1 and the CLK_DELAY

value is non-zero, then wait the amount of time of the

CLK_DELAY value.

c) If the CLK_DLY_EN is 0 and the CLK_DELAY value

is non-zero, then wait as in (a) but no longer than (b).

At the completion of the wait above, de-assert the

CLK_DIS bits specified in GLCP_PMCLKDISABLE

(MSR 51700009h[33:0]) and assert Sleep Acknowl-

edge to the PMC.

When the Sleep Acknowledge is received, the PMC

can optionally issue additional external generic con-

trols SLEEP_X and SLEEP_Y as well as SLP_CLK#to

turn off external clocks. The completion of this step

takes the system to S1. The system is now in Sleep.

If the Sleep Request was to enter S3 (Save-to-RAM)

then the PMC moves beyond S1 and removes main

power by de-asserting WORK_AUX and leaving

WORKING asserted. WORKING is used to power

main memory, while WORK_AUX is used for every-

thing else in the system.

If the Sleep Request was to enter S4 (Save-to-Disk) or

S5 (Soft Off) then the PMC moves beyond S1 and

removes

main

power

de-asserting

both

WORK_AUX and WORKING.

10) An external or internal wakeup event reverses the

events above to bring the system back to the S0 state.

Figure 4-54. PMC System Sleep Sequence

Sleep Request

SUSP#

SUSPA#

GL Device Clock Control

Sleep Acknowledge

PCI/IDE Input Control

SLEEP_X/SLEEP_Y

PCI/IDE Output Control

SLP_CLK_EN#

Indicates a variable delay.

NOTE: External signals are not necessarily active high. Shown as active high for clarity.

SLP_CLK_EN# signal must be the last control to assert because it turns off all system clocks.

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