CS5535 datasheet(185/555 Pages) NSC

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Direct Memory Access (DMA)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• DMA Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

• DMA Native Registers: Accessed as I/O Addresses.

Low Pin Count (LPC)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• LPC Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

Real-Time Clock (RTC)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• RTC Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

• RTC Native Registers: Accessed as I/O addresses.

General Purpose Input Output (GPIO)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• GPIO Native Registers: Accessed via a base address

offsets.

– GPIO Low/High Bank Feature Bit Registers

– GPIO Input Conditioning Function Registers

– GPIO Interrupt and PME Registers

Multi-Function General Purpose Timer (MFGPT)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• MFGPT Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

• MFGPT Native Registers: Accessed via a base address

I/O offsets.

Power Management Controller (PMC)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• PMC Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

• ACPI Registers: Accessed via a base address register,

MSR_LBAR_ACPI (MSR 5140000Eh), as I/O offsets.

• PM Support Registers: Accessed via a base address

offsets.

Flash Controller

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• Flash Controller Specific MSRs: Accessed via RDMSR

and WRMSR instructions.

• Flash Controller Native Registers: Accessed via a base

address register as either memory or I/O offsets:

— MSR_LBAR_FLSH0 (MSR 51400010h) for use with

FLASH_CS0#.

— MSR_LBAR_FLSH1 (MSR 51400011h) for use with

FLASH_CS1#.

— MSR_LBAR_FLSH2 (MSR 51400012h) for use with

FLASH_CS2#.

— MSR_LBAR_FLSH3 (MSR 51400013h) for use with

FLASH_CS3#.

GeodeLink Control Processor (GLCP)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions.

• GLCP Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

Note that MSRs for the Floppy Port, PIT, PIC, KEL, SMB,

UART, DMA, LPC, RTC, GPIO, MFGPT, and Flash Control-

ler modules are part of the DIVIL (i.e., MSR 51400000h-

514000FFh). Hence, the Standard GeodeLink Device

MSRs (MSR 51400000h-51400007h) are documented in

the DIVIL register description and the device Specific

MSRs are documented in their appropriate register

description chapter.

The tables in this chapter use the following abbreviations:

Type

Description

R/W

Read/Write.

Read from a specific address returns the

value of a specific register.

Write to the same address is to a different

WWrite.

Read Only.

Write Only.

R/W1C

Read/Write 1 to clear. Writing 1 to a bit

clears it to 0. Writing 0 has no effect.

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