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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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CS5535 датащи(PDF) 186 Page - National Semiconductor (TI) |
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CS5535 датащи(HTML) 186 Page - National Semiconductor (TI) |
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186 / 555 page  www.national.com 186 Revision 0.8 5.1 GEODELINK INTERFACE UNIT REGISTER DESCRIPTIONS The GeodeLink Interface Unit (GLIU) registers are Model Specific Registers (MSRs) and are accessed through the RDMSR and WRMSR instructions. The MSR address is derived from the perspective of the CPU Core. See Section 3.2 "CS5535 MSR Addressing" on page 53 for more details on MSR addressing. The MSRs are split into the following groups: • Standard GeodeLink Device MSRs • P2D Descriptor MSRs • GLIU Specific MSRs • IOD Descriptor MSRs Tables 5-1 through 5-4 are GLIU register summary tables that include reset values and page references where the bit descriptions are provided. Reserved (RSVD) fields do not have any meaningful stor- age elements. They always return 0. Table 5-1. Standard GeodeLink Device MSRs Summary MSR Address Type Register Name Reset Value Reference 51010000h RO GeodeLink Device Capabilities MSR (GLIU_GLD_MSR_CAP) 00000000_000010xxh Page 189 51010001h R/W GeodeLink Device Master Configuration MSR (GLIU_GLD_MSR_CONFIG) 0000000_00000004h Page 189 51010002h R/W GeodeLink Device SMI MSR (GLIU_GLD_MSR_SMI) 00000000_00000001h Page 190 51010003h R/W GeodeLink Device Error MSR (GLIU_GLD_MSR_ERROR) 00000000_00000001h Page 191 51010004h R/W GeodeLink Device Power Management MSR (GLIU_GLD_MSR_PM) 00000000_00000000h Page 193 51010005h R/W GeodeLink Device Diagnostic MSR (GLIU_GLD_MSR_DIAG) 00000000_00000000h Page 193 51010006h- 5101000Fh R/W GLIU Reserved MSRs (GLD_MSRs_RSVD) 00000000_00000000h --- Table 5-2. P2D Descriptor MSRs Summary MSR Address Type Register Name Reset Value Reference 51010020h R/W P2D Base Mask Descriptor 0 (GLIU_P2D_BM0) 000000FF_FFF00000h Page 194 51010021h R/W P2D Base Mask Descriptor 1 (GLIU_P2D_BM1) 000000FF_FFF00000h Page 194 51010022h R/W P2D Base Mask Descriptor 2 (GLIU_P2D_BM2) 000000FF_FFF00000h Page 194 51010023h R/W P2D Base Mask KEL Descriptor 0 (GLIU_P2D_BMK0) 000000FF_FFF00000h Page 195 51010024h R/W P2D Base Mask KEL Descriptor 1 (GLIU_P2D_BMK1) 000000FF_FFF00000h Page 195 51010025h- 5101003Fh R/W P2D Reserved Descriptors (P2D_RSVD) 00000000_00000000h --- |
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