CS5535 datasheet(184/555 Pages) NSC

184 / 555 page

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184

Revision 0.8

5.0

This chapter provides detailed information regarding the

registers of the CS5535. The register descriptions are doc-

umented at the module-level and briefly summarized

below.

GeodeLink Interface Unit (GLIU)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions.

• P2D Descriptor MSRs: Accessed via RDMSR and

WRMSR instructions. (Memory base descriptor.)

• GLIU Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

• IOD Descriptor MSRs: Accessed via RDMSR and

WRMSR instructions. (I/O base descriptor.)

GeodeLink PCI South Bridge (GLPCI_SB)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions.

• GLPCI_SB Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

• PCI Configuration Registers: Index accessed via PCI

configuration cycle.

Audio Codec 97 Controller (ACC)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions.

• ACC Native Registers: Accessed as I/O offsets from a

GLIU IOD descriptor.

ATA5 Controller (ATAC)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions.

• ATAC Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

• ATAC Native Registers: Accessed as I/O offsets from a

GLIU IOD descriptor.

Universal Serial Bus Controllers (USBC1, USBC2)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions.

• USB Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

• USB Embedded PCI Configuration Registers: Accessed

via RDMSR and WRMSR instructions. Also requires

GLIU P2D descriptor.

• Host Controller Native Registers: Accessed via a base

address register at USB PCI Index 10h as memory

offsets.

Diverse Integration Logic (DIVIL)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions.

• DIVIL Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

Floppy Port

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• Floppy Port Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

Programmable Interval Timer (PIT)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• PIT Specific MSRs: Accessed via RDMSR and WRMSR

instructions.

• PIT Native Registers: Accessed as I/O addresses.

Programmable Interrupt Controller (PIC)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• PIC Specific MSRs: Accessed via RDMSR and WRMSR

instructions.

• PIC Native Registers: Accessed as I/O addresses.

Keyboard Emulation Logic (KEL)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• KEL Specific MSRs: Accessed via RDMSR and

WRMSR instructions.

• KEL Native Registers: Accessed via a base address

MSR_LBAR_KEL2 (MSR 5140000Ah), as memory

offsets.

System Management Bus (SMB)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• SMB Native Registers: Accessed via a base address

offsets.

Universal Asynchronous Receiver-Transmitter (UART)

• Standard GeodeLink Device MSRs: Accessed via

RDMSR and WRMSR instructions. (Shared with DIVIL.)

• UART/IR Controller Specific MSRs: Accessed via

RDMSR and WRMSR instructions.

• UART/IR Controller Native Registers: Accessed via

Banks 0 through 7 as I/O offsets. See MSR_LEG_IO

(MSR 51400014h) bits [22:20] and bits [18:16] for

setting base address.

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