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FXPS7115D4S датащи(PDF) 12 Page - NXP Semiconductors |
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FXPS7115D4S датащи(HTML) 12 Page - NXP Semiconductors |
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12 / 72 page ![]() NXP Semiconductors FXPS7115D4S Digital absolute pressure sensor, 40 kPa to 115 kPa aaa-023461 TEMPERATURE ∑ CONVERTER SINC FILTER OFFSET AND GAIN TRIM to temperature output temperature sensor MOVING AVERAGE Figure 12. Temperature sensor signal chain block diagram 7.3.4.2 Temperature sensor output scaling equation Equation 5 is used to convert temperature readings with the variables specified in Table 8. (5) Where: TDEGC = The temperature output in degrees C TLSB = The temperature output in LSB T0LSB = The expected temperature output in LSB at 0 °C TSENSE = The expected temperature sensitivity in LSB/°C Data reading T0LSB (LSB) TSENSE LSB/C) 8-bit register read 68 1 Table 8. Temperature conversion variables 7.3.5 Common mode error detection signal chain The device includes a continuous pressure transducer common mode error detection. A simplified block diagram is shown in Figure 13. The common mode error signal is compared against the normal absolute pressure signal. If the comparison falls outside pre-determined limits, the CM_ERROR bit in the DSP_STAT register is set. Once the error condition is removed, the CM_ERROR bit is cleared as specified in Section 7.7.15 "DSP_STAT - DSP specific status register (address 60h)". aaa-023462 SINC FILTER COMPENSATION common mode error signal common mode signal from ADC LOW PASS FILTER Figure 13. Common mode error detection signal chain block diagram 7.4 Inter-integrated circuit (I2C) interface The device includes an interface compliant to the NXP I2C-bus specification[4]. The device operates in client mode and includes support for standard mode, fast mode, and fast mode plus, although the maximum practical operating frequency for I2C in a given system implementation depends on several factors including the pull-up resistor values and the total bus capacitance. 7.4.1 I2C bit transmissions The state of SDA when SCL is high determines the bit value being transmitted. SDA must be stable when SCL is high and change when SCL is low as shown in Figure 14. After the START signal has been transmitted by the host, the bus is considered busy. Timing for the start condition is specified in Table 105. FXPS7115D4S All information provided in this document is subject to legal disclaimers. © 2023 NXP B.V. All rights reserved. Objective data sheet Rev. 1.2 — 28 June 2023 12 / 72 |
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