FXPS7115D4S datasheet(27/72 Pages) NXP

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NXP Semiconductors

FXPS7115D4S

Digital absolute pressure sensor, 40 kPa to 115 kPa

7.5.6 SPI timing diagram

aaa-023749

DSP Out

SS_B

SCLK

MISO

MOSI

tDISABLE

tCLKSS

tLAT

tSSN

tSSCLK

tSCLKH

tSCLKF

tSCLKR

tSCLK

tLEAD

tLAG

tHOLD_IN

tHOLD_OUT

tVALID

tSCLKL

tACCESS

tSETUP

Figure 22. SPI timing diagram

7.6 User-accessible data array

A user-accessible data array allows each device to be customized. The array consists of a one time

programmable (OTP) factory-programmable block, an OTP user-programmable block, and read-only registers

for data and device status. The OTP blocks incorporate independent data verification. In order to perform the

OTP, a custom platform is typically used prior to PCB assembly since the VPP voltage required is much higher

than the nominal supply as shown in Table 103. See application note AN12727[3].

Bit

Address Register

Type[1]

General device information

00h

COUNT

COUNT[7:0]

01h

DEVSTAT

DSP_ERR

reserved

COMM_ERR MEMTEMP_

ERR

SUPPLY_

ERR

TESTMODE

DEVRES

DEVINIT

02h

DEVSTAT1

VCCUV_

ERR

reserved

INTREGA_

ERR

INTREG_

ERR

INTREGF_

ERR

CONT_ERR

03h

DEVSTAT2

F_OTP_ERR

U_OTP_

ERR

U_RW_ERR

U_W_

ACTIVE

reserved

TEMP0_

ERR

reserved

04h

DEVSTAT3

MISO_ERR

reserved

05h to

0Dh

reserved

0Eh

TEMPERATURE R

TEMP[7:0]

0Fh

reserved

Table 35. User-accessible data — sensor specific information

FXPS7115D4S

All information provided in this document is subject to legal disclaimers.

Objective data sheet

Rev. 1.2 — 28 June 2023

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