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VL6524 датащи(PDF) 38 Page - STMicroelectronics

номер детали VL6524
подробное описание детали  VGA single-chip camera module
PDF  70 Pages
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производитель  STMICROELECTRONICS [STMicroelectronics]
домашняя страница  http://www.st.com
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VL6524 датащи(HTML) 38 Page - STMicroelectronics

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Host communication - I²C control interface
VL6524/VS6524
38/70
Current location, single data read
For the master reading from the slave the R/W bit is set to one. The register index of the
data returned is that accessed by the previous read or write message.
The first data byte returned by a read message is the contents of the internal index value
and NOT the index value. This was the case in older V2W implementations.
Note that the read message is terminated with a negative acknowledge (A) from the master:
it is not guaranteed that the master will be able to issue a stop condition at any other time
during a read message. This is because if the data sent by the slave is all zeros, the SDA
line cannot rise, which is part of the stop condition.
Figure 26.
Current location, single read
DATA
DATA[7:0]
DATA[7:0]
S
DEV ADDR R/W A
‘1’ (Read)
P
A
16-bit index, 8-bit data current location, single data read
From Master to Slave
From Slave to Master
S = START Condition
Sr = repeated START
P = STOP Condition
A = Acknowledge
A = Negative Acknowledge
Previous Index Value, K



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