CS5308GDWR28 datasheet(28/31 Pages) ONSEMI

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+ 0.575 @ [(162 ) 16 @ 12 ) 122) 3]1 2

(20)

IRMS,CNTL + D @ [(ILo,MAX2 ) ILo,MAX @ ILo,MIN

) ILo,MIN2) 3]1 2

+ 8.08 ARMS

Equation 19 is used to calculate the power dissipation of

the control MOSFET:

PD,CONTROL + (IRMS,CNTL2 @ RDS(on))

) (ILo,MAX @ Qswitch Ig @ VIN @ fSW)

) (Qoss 2 @ VIN @ fSW) ) (VIN @ QRR @ fSW)

(19)

+ (8.082 ARMS @ 5.3 mW)

) (16 A @ 29 nC 1A @ 5V @ 335 kHz)

) (35 nC 2 @ 5V @ 335 kHz)

) (5 V @ 23 nC @ 335 kHz)

+ 0.346 W ) 0.78 W ) 0.03 W ) 0.04 W

+ 1.2 W

The RMS value of the current in the synchronous

MOSFET is calculated from Equation 27 and the previously

derived values for D, ILo,MAX, and ILo,MIN at the converter’s

maximum output current:

(27)

IRMS,SYNCH + 1 * D

@ [(ILo,MAX2 ) ILo,MAX @ ILo,MIN ) ILo,MIN2) 3]1 2

+ 0.669 @ [(162 ) 16 @ 12 ) 122) 3]1 2

+ 11.5 ARMS

Equation 26 is used to calculate the power dissipation of

the synchronous MOSFET:

PD,SYNCH + (IRMS,SYNCH2 @ RDS(on))

) (Vfdiode @ IO,MAX 2 @ t_nonoverlap @ fSW)

(26)

+ (11.52 ARMS @ 5.3 mW)

) (0.76 V @ 28 A 2 @ 65 ns @ 335 kHz)

+ 0.70 W ) 0.23 W + 0.93 W

Equation 28 is used to calculate the heat sink thermal

impedances necessary to maintain less than the specified

maximum junction temperatures at 60°C ambient:

qCNTL t (115 * 60°C) 1.2 W * 1.0°C W + 46°C W

qSYNCH t (115 * 60°C) 0.93 W * 1.0°C W + 59°C W

If board area permits, a cost effective heatsink could be

formed by using a TO−263 mounting pad of at least 1.0−

1.5 in2 per MOSFET on a single−sided, 1 oz. copper PCB (or

0.5 to 0.75 in2 on each side of a two−sided board). If board

space must be conserved, AAVID offers clip−on heatsinks

for TO−220 thru−hole packages. Examples of these

heatsinks include #577002 (1″ × 0.75″ × 0.25″, 39°C/W at

1 W) and #591302 (0.75″ × 0.5″ × 0.5″, 34°C/W at 1 W)

6. Adaptive Voltage Positioning

First, to achieve the 335 kHz switching frequency, use

Figure 3 to determine that a 39 k

W resistor is needed for

ROSC. Then, use Figure 4 to find the VFB bias current at the

corresponding value of ROSC. In this example, the 39 kW

ROSC resistor results in a VFB bias current of approximately

7.0

mA. Knowing the VFB bias current, one can calculate the

required values for RVFBK and RDRP using Equations 29

through 31.

The no−load position is easily set using Equation 29:

RVFBK + DVNO−LOAD IBIASVFB

+ +45 mV 7.0 mA

+ 6.49 kW

(29)

For inductive current sensing, the designer must calculate

the inductor’s resistance (RL) and approximate any

resistance added by the circuit board (RPCB). We found the

inductor’s nominal resistance in Section 2 (1.03 m

W). In this

example, we approximate 0.75 m

W for the circuit board

resistance (RPCB). With this information, Equation 30 can

be used to calculate the increase at the VDRP pin at full load;

DVDRP + IO,MAX @ (RL ) RPCB) @ GVDRP

+ 28 A @ (1.03 mW ) 0.75 mW) @ 3.2 V V

+ 159 mV

(30)

RDRP can then be calculated from Equation 31:

RDRP +

DVDRP

(IBIASVFB ) DVOUT,FULL−LOAD RVFBK)

+ 159 mV (7.0 mA ) 45 mV 6.49 kW)

+ 11.5 kW

(31)

7. Current Sensing

Choose the current sense network (RCSn, CCSn, n = 1 or 2)

to satisfy

RCSn @ CCSn + Lo (RL ) RPCB)

(30)

The component values determined thus far are Lo = 825 nH,

RL = 1.03 mW, and RPCB = 0.75mW. We choose a convenient

value for CCS1 (0.01 mF) and solve for RCS1:

RCSn + 825 nH (1.03 mW ) 0.75 mW) 0.01 mF

+ 46 kW or 50 kW when rounded up.

After the circuit is constructed, the values of RCSn and/or

CCSn should be tuned to provide a “square−wave” at VDRP

with minimal overshoot and fast rise time due to a step

change in load current as shown in Figures 19−21. Based on

experience, the starting value for RCSn is probably too low

and will need to be increased to provide a current sense

signal similar to those in Figure 21.

Equation 30 will be most accurate for higher quality iron

powder core materials such as the −2 or −8 from

Micrometals. The permeability of these more expensive

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