IDT723663 datasheet(13/30 Pages) RENESAS

13 / 30 page

COMMERCIALTEMPERATURERANGE

IDT723663/723673 CMOS SyncFIFOTM WITH BUS-MATCHING

4,096 x 36 x 2 and 8,192 x 36 x 2

SYNCHRONIZED FIFO FLAGS

EachFIFOissynchronizedtoitsportclockthroughatleasttwoflip-flopstages.

This is done to improve flag-signal reliability by reducing the probability of

metastable events when CLKA and CLKB operate asynchronously to one

another. FF/IR, and AF are synchronized to CLKA. EF/OR and AE are

synchronizedtoCLKB.Table4showstherelationshipofeachportflagtothe

number of words stored in memory.

EMPTY/OUTPUTREADYFLAGS(EF/OR)

These are dual purpose flags. In the FWFT mode, the Output Ready (OR)

functionisselected.WhentheOutput-ReadyflagisHIGH,newdataispresent

intheFIFOoutputregister.WhentheOutputReadyflagisLOW,theprevious

datawordispresentintheFIFOoutputregisterandattemptedFIFOreadsare

ignored.

IntheIDTStandardmode,theEmptyFlag(EF)functionisselected.When

the Empty Flag is HIGH, data is available in the FIFO’s memory for reading to

the output register. When the Empty Flag is LOW, the previous data word is

present in the FIFO output register and attempted FIFO reads are ignored.

TheEmpty/OutputReadyflagofaFIFOissynchronizedtotheportclockthat

readsdatafromitsarray(CLKB).ForboththeFWFTandIDTStandardmodes,

theFIFOreadpointerisincrementedeachtimeanewwordisclockedtoitsoutput

pointerandreadpointercomparatorthatindicateswhentheFIFOmemorystatus

isempty,empty+1,orempty+2.

InFWFTmode,fromthetimeawordiswrittentoaFIFO,itcanbeshiftedto

theFIFOoutputregisterinaminimumofthreecyclesoftheOutputReadyflag

synchronizingclock.Therefore,anOutputReadyflagisLOWifawordinmemory

isthenextdatatobesenttotheFlFOoutputregisterandthreecyclesoftheport

ClockthatreadsdatafromtheFIFOhavenotelapsedsincethetimetheword

waswritten.TheOutputReadyflagoftheFIFOremainsLOWuntilthethirdLOW-

to-HIGHtransitionofthesynchronizingclockoccurs,simultaneouslyforcingthe

Output Ready flag HIGH and shifting the word to the FIFO output register.

In IDT Standard mode, from the time a word is written to a FIFO, the Empty

Flagwillindicatethepresenceofdataavailableforreadinginaminimumoftwo

cyclesoftheEmptyFlagsynchronizingclock.Therefore,anEmptyFlagisLOW

if a word in memory is the next data to be sent to the FlFO output register and

twocyclesoftheportClockthatreadsdatafromtheFIFOhavenotelapsedsince

thetimethewordwaswritten.TheEmptyFlagoftheFIFOremainsLOWuntil

thesecondLOW-to-HIGHtransitionofthesynchronizingclockoccurs,forcing

the Empty Flag HIGH; only then can data be read.

A LOW-to-HIGH transition on an Empty/Output Ready flag synchronizing

clockbeginsthefirstsynchronizationcycleofawriteiftheclocktransitionoccurs

attimetSKEW1orgreaterafterthewrite.Otherwise,thesubsequentclockcycle

can be the first synchronization cycle (see Figures 11 and 12).

FULL/INPUT READY FLAGS (FF/IR)

Thisisadualpurposeflag.InFWFTmode,theInputReady(IR)functionis

selected.InIDTStandardmode,theFullFlag(FF)functionisselected.Forboth

timingmodes,whentheFull/InputReadyflagisHIGH,amemorylocationisfree

in the FIFO to receive new data. No memory locations are free when the Full/

Input Ready flag is LOW and attempted writes to the FIFO are ignored.

TheFull/InputReadyflagofaFlFOissynchronizedtotheportclockthatwrites

data to its array (CLKA). For both FWFT and IDT Standard modes, each time

awordiswrittentoaFIFO,itswritepointerisincremented.Thestatemachine

that controls a Full/Input Ready flag monitors a write pointer and read pointer

comparatorthatindicateswhentheFlFOmemorystatusisfull,full-1,orfull-2.

FromthetimeawordisreadfromaFIFO,itspreviousmemorylocationisready

to be written to in a minimum of two cycles of the Full/Input Ready flag

synchronizingclock.Therefore,anFull/InputReadyflagisLOWiflessthantwo

cyclesoftheFull/InputReadyflagsynchronizingclockhaveelapsedsincethe

next memory write location has been read. The second LOW-to-HIGH

transitionontheFull/InputReadyflagsynchronizingclockafterthereadsets

the Full/Input Ready flag HIGH.

ALOW-to-HIGHtransitiononaFull/InputReadyflagsynchronizingclock

beginsthefirstsynchronizationcycleofareadiftheclocktransitionoccursat

timetSKEW1orgreateraftertheread.Otherwise,thesubsequentclockcycle

can be the first synchronization cycle (see Figures 13 and 14).

ALMOST-EMPTY FLAG (AE)

TheAlmost-EmptyflagofaFIFOissynchronizedtotheportclockthatreads

datafromitsarray(CLKB).ThestatemachinethatcontrolsanAlmost-Empty

flagmonitorsawritepointerandreadpointercomparatorthatindicateswhen

theFIFOmemorystatusisalmost-empty,almost-empty+1,oralmost-empty+2.

TheAlmost-EmptystateisdefinedbythecontentsofregisterX.Theseregisters

areloadedwithpresetvaluesduringaFIFOreset,programmedfromPortA,

or programmed serially (see Almost-Empty flag and Almost-Full flag offset

programmingsection).AnAlmost-EmptyflagisLOWwhenitsFIFOcontains

XorlesswordsandisHIGHwhenitsFIFOcontains(X+1)ormorewords.Note

thatadatawordpresentintheFIFOoutputregisterhasbeenreadfrommemory.

TwoLOW-to-HIGHtransitionsoftheAlmost-Emptyflagsynchronizingclock

arerequiredafteraFIFOwriteforitsAlmost-Emptyflagtoreflectthenewlevel

of fill. Therefore, the Almost-Empty flag of a FIFO containing (X+1) or more

wordsremainsLOWiftwocyclesofitssynchronizingclockhavenotelapsed

sincethewritethatfilledthememorytothe(X+1)level.AnAlmost-Emptyflag

issetHIGHbythesecondLOW-to-HIGHtransitionofitssynchronizingclock

aftertheFIFOwritethatfillsmemorytothe(X+1)level.ALOW-to-HIGHtransition

ofanAlmost-Emptyflagsynchronizingclockbeginsthefirstsynchronization

cycleifitoccursattimetSKEW2orgreaterafterthewritethatfillstheFIFOto(X+1)

words.Otherwise,thesubsequentsynchronizingclockcyclemaybethefirst

synchronization cycle. (See Figure 15).

ALMOST-FULL FLAG (AF)

TheAlmost-FullflagofaFIFOissynchronizedtotheportclockthatwrites

datatoitsarray.ThestatemachinethatcontrolsanAlmost-Fullflagmonitors

a write pointer and read pointer comparator that indicates when the FIFO

memorystatusisalmost-full,almost-full-1,oralmost-full-2.TheAlmost-Fullstate

isdefinedbythecontentsofregisterY.Theseregistersareloadedwithpreset

values during a FlFO reset or, programmed from Port A, or programmed

serially (see Almost-Empty flag and Almost-Full flag offset programming

section).AnAlmost-FullflagisLOWwhenthenumberofwordsinitsFIFOis

greater than or equal to (4,096-Y), or (8,192-Y) for the IDT723663, or

IDT723673 respectively. An Almost-Full flag is HIGH when the number of

words in its FIFO is less than or equal to [4,096-(Y+1)], or [8,192-(Y+1)] for

theIDT723663,orIDT723673respectively.Notethatadatawordpresentin

the FIFO output register has been read from memory.

TwoLOW-to-HIGHtransitionsoftheAlmost-Fullflagsynchronizingclockare

requiredafteraFIFOreadforitsAlmost-Fullflagtoreflectthenewleveloffill.

Therefore,theAlmost-FullflagofaFIFOcontaining[4,096/8,192-(Y+1)]orless

wordsremainsLOWiftwocyclesofitssynchronizingclockhavenotelapsed

sincethereadthatreducedthenumberofwordsinmemoryto[4,096/8,192-

(Y+1)].AnAlmost-FullflagissetHIGHbythesecondLOW-to-HIGHtransition

ofitssynchronizingclockaftertheFIFOreadthatreducesthenumberofwords

inmemoryto[4,096/8,192-(Y+1)].ALOW-to-HIGHtransitionofanAlmost-Full

flagsynchronizingclockbeginsthefirstsynchronizationcycleifitoccursattime

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