AMD-766AC datasheet(53/96 Pages) AMD

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Preliminary Information

23167B – March 2001

AMD-766

TM Peripheral Bus Controller Data Sheet

C1A4C: EIDE Controller Cycle Time and Address Setup Time Register

Configuration space; function 1; offset: 4F-4Ch. Default: FFFF 00FFh. Read-write.

For bits[7:0] the value in each 2-bit field, plus one, specifies the address setup time in 30 nanosecond PCI clocks; this

applies to all PIO and multi-word DMA cycles. For bits[31:16] the value in each 4-bit field, plus one, specifies the

time in 30 nanosecond PCI clocks; this applies address ports 171h though 177h, 1F1h though 1F7h, 376h, and 3F6h.

For 170h and 1F0h, see C1A48.

31:28

27:24

23:20

19:16

15:8

7:6

5:4

3:2

1:0

PXPW

PXRT

SXPW

SXRT

Reserved

P0ADD

P1ADD

S0ADD

S1ADD

S1ADD[1:0] Secondary Drive 1 Address Setup Time.

S0ADD[1:0] Secondary Drive 0 Address Setup Time.

P1ADD[1:0] Primary Drive 1 Address Setup Time.

P0ADD[1:0] Primary Drive 0 Address Setup Time.

SXRT[3:0] Secondary Non-170 DIOR#/DIOW# Recovery Time.

SXPW[3:0] Secondary Non-170 DIOR#/DIOW# Active Pulse Width.

PXRT[3:0] Primary Non-1F0 DIOR#/DIOW# Recovery Time.

PXPW[3:0] Primary Non-1F0 DIOR#/DIOW# Active Pulse Width.

C1A50: EIDE Controller UDMA Extended Timing Control Register

Configuration space; function 1; offset: 53-50h. Default: 0303 0303h.

Each byte of this register controls UDMA mode for access to the specified drive. Bits[7:0] specify the secondary

slave drive; bits[15:8] specify the secondary master drive; bits[23:16] specify the primary slave drive; and bits[31:24]

specify the primary master drive.

31:24

23:16

15:8

7:0

P0UDMA

P1UDMA

S0UDMA

S1UDMA

[P0, P1, S0, S1]UDMA[2:0] [Primary, Secondary] Drive [1,0] Cycle Time, [P0, P1, S0, S1]CYCT. Read-write.

Bits[2:0]

UDMA mode

Cycle time

UDMA mode 2

60 nanoseconds

UDMA mode 1

90 nanoseconds

UDMA mode 0

120 nanoseconds

Slow UDMA mode 0

150 nanoseconds

UDMA mode 3

45 nanoseconds

UDMA mode 4

30 nanoseconds

UDMA mode 5

20 nanoseconds

[P0, P1, S0, S1]UDMA[5:3]. Read only. These bits are fixed at their default values.

[P0, P1, S0, S1]UDMA[6] [Primary, Secondary] Drive [1,0] Ultra DMA Mode Enable,

[P0, P1, S0, S1]UDMAEN. Read-write. 1=Enable UDMA mode.

[P0, P1, S0, S1]UDMA[7] [Primary, Secondary] Drive [1,0] Ultra DMA Mode Enable Method,

[P0, P1, S0, S1]ENMODE. Read-write. 1=Enable UDMA mode by setting bit 6 of this register. 0=Enable UDMA

mode by detecting the “Set Feature” ATA command.

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