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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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AD1986ABSTZ датащи(PDF) 21 Page - Analog Devices |
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AD1986ABSTZ датащи(HTML) 21 Page - Analog Devices |
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21 / 56 page  AD1986A Rev. 0 | Page 21 of 56 AC ’97 REGISTER DETAILS RESET (REGISTER 0x00) Writing any value to this register performs a register reset, which causes all registers to revert to their default values. The serial configuration (0x74) register will not reset the SLOT16, REGM [2:0], SPOVR, SPAL, SPDZ, and SPLNK. These bits are reset on a hard, hardware, or power-on reset. The REGM and serial configuration bits are reset only by an external hardware reset. The AC ’97, Revision 2.3, Page 1 registers codec class/rev (0x601), PCI SVID (0x621), PCI SID (0x641), function information (0x681—per supported function), and sense register ST [3:0] bits (0x6A1 D [15:13]—per supported function) are reset only on a power-on reset. To satisfy the AC ’97, Revision 2.3 requirements, these registers/bits are sticky across all software and hardware resets. Reading this register returns the ID code of the part and a code for the type of 3D stereo enhancement. Reg Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default 0x00 Reset x SE4 SE3 SE2 SE1 SE0 ID9 ID8 ID7 ID6 ID5 ID4 ID3 ID2 ID1 ID0 0x0290 Table 73. Register Function The ID decodes the capabilities of the AD1986A based on the functions. Bit Function AD1986A ID [9:0] ID0 Dedicated MIC PCM In channel 0 ID1 Reserved (per AC ’97, Revision 2.3) 0 ID2 Bass and treble control 0 ID3 Simulated stereo (mono to stereo) 0 ID4 Headphone out support 1 0x290 ID5 Loudness (bass boost) support 0 ID6 18-bit DAC resolution 0 ID7 20-bit DAC resolution 1 ID8 18-bit ADC resolution 0 ID [9:0] (RO) (Identify Capability) ID9 20-bit ADC resolution 1 SE [4:0] (RO) (Stereo Enhancement) The AD1986A does not provide hardware 3D stereo enhancement (all bits are zero). Default: 0x00 x Reserved. Default: 0 MASTER VOLUME (REGISTER 0x02) This register controls the LINE_OUT, SURROUND, and CENTER/LFE outputs’ mute and volume controls in unison. Each volume sub- register contains five bits, generating 32 volume steps of −1.5 dB each for a range of 0 dB to −46.5 dB. The headphone output (HP_OUT) mute and volume are controlled separately by the headphones volume register (0x04).The mono output (MONO_OUT) mute and volume are controlled separately by the mono volume register (0x06). To control the LINE_OUT, SURROUND, and CENTER/LFE volumes separately, use the front DAC volume register (0x18) for LINE_OUT; the surround DAC Volume register (0x38) for SURROUND; and the C/LFE DAC volume register (0x36) for CENTER/LFE. Reg Name D15 D14 D13 D12 D11 D10 D9 D8 D7 D6 D5 D4 D3 D2 D1 D0 Default 0x02 Master Volume LM x x LV4 LV3 LV2 LV1 LV0 RM x x RV4 RV3 RV2 RV1 RV0 0x8080 |
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