Chip Errata

DSP56366 Digital Signal Processor

Mask:2J26D

DSP56366 Errata

366CE2J26D_0_0

NG 11/12/01 pg. 7 of 25

 1997 -2001, Motorola

ES94

cont.

2. Enable DMA channel

movep

#$867a40,x:M_DCR3

;; enable DMA channel 3,

;; block transfer mode,

;; DRS[4:0] = 01111

Example 2 :

Assuming that Timer 0 is not used while a block of #DCO3 words is to be

transferred by DMA channel 3, the Timer0 (TCF0 = 1, DRS[4:0] = 10000) trigger

can be used instead of a software trigger for channel 3.

1. Initialize DMA channel registers

movep #DSR3,x:M_DSR3

movep #DDR3,x:M_DDR3

movep #DCO3,x:M_DCO3

2. Initialize Timer 0

movep

#$0,x:M_TCSR0

;;no prescaling, inv=0, mode 0,

;; no interrupt, reload is disabled

movep

#$0,x:M_TLR0

;;initialize load reg.

movep

#$0,x:M_TCPR0

;;initialize compare reg.

3. Generate DMA channel trigger

- option 1

movep

#$A48254,x:M_DCR3

;; enable DMA channel 3, block

transfer

;; mode, DE isn’t disabled at end of

;; transfer, triggered by Timer0

(TCF0=1)

bset

#M_TE,x:M_TCSR0

;; enable timer

nop

nop

bclr

#M_TE,x:M_TCSR0

;; disable timer

- option 2

movep

#$848254,x:M_DCR3

;; enable DMA channel 3, block

transfer

;; mode, DE is disabled at the end of

;; the transfer, triggered by Timer0

;; (TCF0=1)

bset

#M_TE,x:M_TCSR0

;; enable timer

nop

nop

bclr

#M_TE,x:M_TCSR0

;; disable timer

2J26D

Errata

Number

Errata Description

Applies

to Mask

Freescale Semiconductor, Inc.

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