Data Sheet

ADAF1080

SPECIFICATIONS

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Rev. 0 | 5 of 36

GENERAL CHARACTERISTICS

−40°C ≤ TA ≤ +125°C, VDD = 4.5 V to 5.5 V, the VOUT pin has a 1 kΩ resistor load (ROUT) with a 1 nF capacitor load (COUT) to GND. VOUT is

taken between the ROUT and COUT components. The output voltage common mode is set to VSET/2, where VSET is the voltage on the VSET pin

and is tied to VDD, unless otherwise stated.

Table 5. General Characteristics

Parameter

Symbol

Test Conditions/Comments

Min

Typ

Max

Unit

OFFSET—OUTPUT REFERRED

Electrical Offset with Flipping

VOFFSETwFLIP Residual offset with the use of internal flip coil

TA = −40°C to +125°C, VDD = 5 V, G = 801

20

µV

TA = −40°C to +125°C, input equivalent2

100

nT

Electrical Offset Stability

Standard deviation of VOFFSETwFLIP3

TA = 25°C, VDD = 5 V, G = 801

6.8

µV rms

TA = 25°C, input equivalent

34

nT rms

Electrical Offset without Flipping

VOFFSET

Without the use of the internal flip coil

TA = 25°C, VDD = 5 V, G = 801

−100

−4

+100

mV

Temperature Offset Coefficient

TCOFFSET

Without the use of the internal flip coil

TA = −40°C to +125°C, VDD = 5 V, G = 801

−130

+650

μV/°C

TA = −40°C to +125°C, input equivalent

±650

nT/°C

Electrical Offset Drift over Lifetime

VOFFSET_LT

Without the use of the internal flip coil

VDD = 5 V, G = 80, TA = 25°C1

−23

μV

Magnetic Offset Hysteresis

Sweep from −8 mT to +8 mT

0.7

μT

OUTPUT

Bandwidth

f−3dB

−3 dB bandwidth

ROUT = 0 Ω, COUT = 150 pF, G = 80

1.45

MHz

ROUT = 0 Ω, COUT = 150 pF, G = 40 or G = 20

2.2

MHz

Noise

VNOISE

Low frequency RMS noise, 0.1 Hz to 10 Hz, VDD = 5 V, G =

80, B = 0 mT1

Chopping enabled, SYNC_EN pin pulled to VDD

16

µV rms

Chopping disabled, SYNC_EN pin pulled to GND

350

µV rms

Noise density, frequency = 50 kHz, VDD = 5 V, G = 80, B = 0

mT1

1.2

µV/√Hz

Noise density magnetic field equivalent, frequency = 50 kHz,

VDD = 5 V, G = 80, B = 0 mT

6

nT/√Hz

Voltage Range

VOUT

0.2

VDD − 0.2

V

Internal Series Resistance

RSERIES

Series resistance on the VOUT pin

2

Ω

External Load Capacitance

COUT

From ROUT to GND, solder close to the package, ROUT = 0 Ω

in series with VOUT

100

150

pF

200 Ω < ROUT < 5 kΩ

1

10

nF

ROUT > 5 kΩ

10

nF

Short-Circuit Current

ISC

Short to GND

−50

mA

Short to VDD

70

mA

VSET INPUT

Voltage Range

VSET

Sets the output common mode to VSET/2, where VSET is the

voltage applied to the VSET pin

0.1

VDD − 0.1

V

Input Impedance

RIN

70

kΩ

DIGITAL INPUTS (A0, A1)

Input Voltage

High

VIH

1.5

V

Low

VIL

0.3

V