IN100-Q1-R-RC1F datasheet(16/49 Pages) ETC

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N1EDOC-DS-IN100-EN-V1.3

The device provides a 4Kbit eFuse memory to store the configuration and advertising data packet

information. The eFuse memory is organized as 256 16-bit words. The data in the eFuse memory

is broken into 4 regions.

Region 1 contains the commonly used configuration data, which is predefined and has

fixed length.

Region 2 contains more flexible configuration data, specified through register read/write

based on different trigger conditions. This region has a user-defined length and is

application-dependent.

Region 3 contains the data that needs to be transmitted and how the data is transmitted.

It also has a user-defined length and is application-dependent.

Region 4 contains the instruction definition of the I2C protocols and is application

dependent.

Region 2, 3 and 4 are optional and they may not be present. The presentation of the Region 2, 3

and 4 are specified in the region 1.

Table 3：eFuse memory structure definition overview

Region

Description

Length

Commonly used configuration data.

Fixed

More flexible configuration data through register

read/write.

Application dependent

Data to be transmitted and how the data is

transmitted.

Application dependent

I2C instruction definition

Application dependent

The detailed content of the regions of the eFuse memory can be automatically generated by

NanoBeacon Config PC GUI according to user’s configuration and application.

NOTE that the eFuse memory can only be programmed once. Bits in the eFuse memory can only

be written to 1 by the programmer and cannot be cleared to 0 afterwards.

3.4. SRAM

The device has an on-chip 4KB SRAM which can be used for advertising control and data storage.

The content of the SRAM can be dynamically changed or updated by the external MCU.

3.5. Advertising control

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