L9654 datasheet(19/59 Pages) STMICROELECTRONICS

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DocID14218 Rev 3

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L9654

Functional description

4.5

IREF

IREF pin shall be connected to VDD supply through a resistor, RIREF. When the device

detects the resistor on IREF pin is larger than RIREF_H or smaller than RIREF_L, it goes in

reset condition. All outputs are disabled and all internal registers are reset to their default

conditions.

4.6

Loss of ground

When GND pin is disconnected from PC-board ground, L9654 goes in reset condition. All

outputs are disabled and all internal registers are reset to their default conditions. A loss of

power-ground (GND0 – GND3) pin/s disables the respective channel/s. In other words, the

channel that loses its power ground connection is not able to deploy. The rest of the device

is not affected by a loss of power-ground condition.

AOUT_GND pin is a reference for AOUT pin. When AOUT_GND loses its connection the reset

loses it as well.

4.7

Deployment and reset

The following conditions reset and terminate deployments:



Power On Reset (POR)



IREF resistance is larger than RIREF_H or smaller than RIREF_L



Loss of ground condition on GND pin

The following conditions are ignored when there is a deployment in-progress:



RESETB



Valid soft reset sequences

4.8

Serial peripheral interface (SPI)

The device contains a serial peripheral interface consisting of Serial Clock (SCLK,

SCLK_A), Serial Data Out (MISO, MISO_A), Serial Data In (MOSI, MOSI_A), and two Chip

Selects (CS_A, CS_D and CS_S). This device is configured as an SPI slave. The idle state

of the communication, Serial Clock (SCLK, SCLK_A) should be in low state.

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