PCF8545ATT datasheet(52/103 Pages) NXP

52 / 103 page

PCA8530

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Product data sheet

Rev. 2 — 25 September 2014

52 of 103

NXP Semiconductors

PCA8530

Automotive 102 x 4 Chip-On-Glass LCD segment driver

Storage is allowed only when the content of the device address register matches with the

hardware device address applied to A0 and A1 (see Section 8.2.3). If the content of the

device address register and the hardware device address do not match, then data storage

is inhibited but the data pointer is incremented as if data storage had taken place.

8.14.2 RAM filling

For the following examples showing the RAM filling patterns, it is assumed that the bits

shown in Table 38 are transferred to the RAM.

8.14.2.1

RAM filling in static drive mode

In the static drive mode, the eight transmitted data bits are placed in eight successive

display RAM columns in row 0 (see Table 39).

In order to fill the whole RAM row, 13 bytes must be sent to the PCA8530. Any data bits

that spill over the RAM and additional data bytes sent are discarded.

8.14.2.2

RAM filling in 1:2 multiplex drive mode

In the 1:2 multiplex drive mode the eight transmitted data bits are placed in four

successive display RAM columns of two rows (see Table 40).

In order to fill the whole two RAM rows 26 bytes need to be sent to the PCA8530. Any

data bits that spill over the RAM and additional data bytes sent are discarded.

Table 38.

Bit scheme used to illustrate the RAM filling patterns

Bit 7

MSB

LSB

Byte

aa7

aa6

aa5

aa4

aa3

aa2

aa1

aa0

ab7

ab6

ab5

ab4

ab3

ab2

ab1

ab0

:::::

by7

by6

by5

by4

by3

by2

by1

by0

Table 39.

RAM filling in static drive mode

RAM row/

backplane

output

(COM)

RAM column/Segment output (S)

100

101

aa7 aa6 aa5 aa4 aa3 aa2 aa1 aa0 ab7 ab6 ab5 ab4 ab3 ab2 ab1 ab0 :

am4 am3 am2

----------------:

Table 40.

RAM filling in 1:2 multiplex drive mode

RAM row/

backplane

output

(COM)

RAM column/Segment output (S)

100

101

aa7

aa5

aa3

aa1

ab7

ab5

ab3

ab1

ay1

az7

az5

aa6

aa4

aa2

aa0

ab6

ab4

ab2

ab0

ay0

az6

az4

---

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