TDF8599B datasheet(13/54 Pages) NXP

13 / 54 page

NXP Semiconductors

TDF8599B

I2C-bus controlled dual channel 43 W/2 Ohm, single channel 85 W/1 Ohm class-D power amplifier with

load diagnostics

TDF8599B

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 23 August 2016

13 / 54

8.4.2 Phase staggering (Slave mode)

In Slave mode with phase lock operation enabled, a phase shift with respect to the

incoming clock signal can be selected to distribute the switching moments over time.

In non-I2C-bus mode, 1/2 π phase shift can be programmed using pin MOD. In I2C-bus

mode, five different phase shifts (1/4 π, 1/3 π, 1/2 π, 2/3 π, 3/4 π) can be selected using

the I2C-bus bits (IB3[D1:D3]). See Table 8 for selection of the phase shift in non-I2C-

bus mode with pin MOD. An additional capacitor must be connected to pin SSM when

1/4 π phase shift is used (see Figure 8). An example of using 1/2 π phase shift for BD

modulation is shown in Figure 12.

001aai783

OUT1P

phase

OUT1N

OUT2P

OUT2N

OUT1P

OUT1N

OUT2P

master

slave

OUT2N

Figure 12. Master and slave operation with 1/2 π phase shift

8.4.3 Parallel mode

In Parallel mode; the two output stages operate in parallel to enlarge the drive capability.

The inputs and outputs for Parallel mode must be connected on the Printed-Circuit Board

(PCB) as shown in Figure 13. The parallel connection can be made after the output filter,

as shown in Figure 13 or directly to the device output pins (OUTxP and OUTxN).

001aak219

IN1P

MOD

RMOD

IN2N

IN1N

OUT1N

OUT2N

OUT1P

OUT2P

IN2P

TDF8599B

Figure 13. Parallel mode

In Parallel mode, the channel 1 I2C-bus bits can be programmed using the I2C-bus.

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