TDF8599B datasheet(6/54 Pages) NXP

6 / 54 page

NXP Semiconductors

TDF8599B

I2C-bus controlled dual channel 43 W/2 Ohm, single channel 85 W/1 Ohm class-D power amplifier with

load diagnostics

TDF8599B

All information provided in this document is subject to legal disclaimers.

Product data sheet

Rev. 2 — 23 August 2016

6 / 54

circuits for both high-side and low-side enabling the DMOS power output transistors to

be driven. An external 2nd order low-pass filter converts the PWM signal into an analog

audio signal across the loudspeakers.

The TDF8599B includes integrated common circuits for all channels such as the

oscillator, all reference sources, mode functionality and a digital timing manager. In

addition, the built-in protection includes thermal foldback, temperature, overcurrent and

overvoltage (load dump).

The TDF8599B operates in either I2C-bus mode or non-I2C-bus mode. In I2C-bus mode,

DC load detection, frequency hopping and extended configuration functions are provided

together with enhanced diagnostic information.

8.2 Mode selection

The mode pins EN, ADS and SEL_MUTE enable mute state, I2C-bus mode and

Operating mode switching.

Pin SEL_MUTE is used to mute and unmute the device and must be connected to an

external capacitor (CON). This capacitor generates a time constant which is used to

ensure smooth fade-in and fade-out of the input signal.

The TDF8599B is enabled when pin EN is HIGH. When pin EN is LOW, the TDF8599B is

off and the supply current is at its lowest value (typically 2 μA). When off, the TDF8599B

is completely deactivated and will not react to I2C-bus commands.

I2C-bus mode is selected by connecting a resistor between pins ADS and AGND. In I2C-

bus mode with pin EN HIGH, the TDF8599B waits for further commands (see Table 4).

I2C-bus mode is described in Section 9.

Non-I2C-bus mode is selected by connecting pin ADS to pin AGND. In non-I2C-bus

mode, the default TDF8599B state is Mute mode. The amplifiers switch idle (50 % duty

cycle) and the audio signal is suppressed at the output. In addition, the capacitor (CSVRR)

is charged to half the supply voltage. To enter Operating mode, pin SEL_MUTE must be

HIGH with S1 open, enabling capacitor (CON) charged by an internal pull-up (see Figure

3). In addition, pin EN must be driven HIGH.

001aak216

SEL_MUTE

ADS

AGND

3.3 V

CON

TDF8599B

Non-I2C-bus mode

001aak217

SEL_MUTE

3.3 V

CON

TDF8599B

ADS

RADS

AGND

I2C-bus mode

See table 13 for detailed information on RADS

Figure 3. Mode selection

I2C-bus mode and non-I2C-bus mode control are described in Table 4 and Table 5.

Switches S1 and S2 are shown in Figure 3.

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