ADA4097-1BUJZ-R5 datasheet(22/31 Pages) AD

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Data Sheet

ADA4097-1/ADA4097-2

THEORY OF OPERATION

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Rev. A | 22 of 31

Noise Gain = 1 + RF/RI

When the amplifiers transition to Over-The-Top operation with the

input common-mode biased near or above the +VS supply, consider

the value of RIN.

The noise gain of the amplifiers increases as shown in the following

equation:

Noise GainOTT= 1+ RF

RI RIN+RI RF

1+RI RFRIN

where Noise GainOTT is the Over-The-Top noise gain.

The dc closed-loop gain remains mostly unaffected (RF/RI). Howev-

er, the loop gain of the amplifier decreases, as expressed in the

following equation:

AOL1+RFRIto AOL

NoiseGainOTT

Likewise, the closed-loop bandwidth (BWCLOSED_LOOP) of the ampli-

fier changes going from normal operation to Over-The-Top opera-

tion.

In normal operation,

BWCLOSED_LOOP ≈

GBP

1+ RFRI

In Over-The-Top operation,

BWCLOSED_LOOP≈

GBP

NoiseGainOTT

Output voltage noise density (eno) is impacted when the device

transitions from normal operation to Over-The-Top operation. Resis-

tor noise is neglected in both modes of operation in the following

equations.

In normal operation, neglecting resistor noise,

eno≅en1+RFRI

where en is input referred voltage noise density.

In Over-The-Top operation, neglecting resistor noise,

eno≅en×Noise GainOTT

OUTPUT

The output of the ADA4097-1/ADA4097-2 can swing rail-to-rail to

within 15 mV of either supply with no load. The output can source

30 mA and sink 40 mA. The amplifiers are internally compensated

to drive at least 200 pF of load capacitance (CLOAD). Adding a

series resistance of 50 Ω between the output and larger capacitive

loads extends the capacitive drive capability of the amplifier.

If the ADA4097-1/ADA4097-2 enter shutdown, the VOUT

(ADA4097-1) pin or the VOUTx pins (ADA4097-2) appears as high

impedance with two steering diodes connected to either supply. In

this state, the output typically leaks <5 nA.

SHUTDOWN PINS (SHDN AND SHDNX)

The ADA4097-1/ADA4097-2 have dedicated shutdown pins (SHDN

for the ADA4097-1, and SHDN1 and SHDN2 for the 10-lead LFCSP

ADA4097-2 only) to place the amplifiers in a low power shutdown

state when asserted high. A logic high is defined by a voltage

≥1.5 V applied to the SHDN pin and SHDNx pins with respect to

the −VS pin. In shutdown, the amplifiers draw <20 μA of supply

current (see Figure 9) and the VOUT pin (ADA4097-1) or VOUTx pins

(ADA4097-2) are placed in a high impedance state.

The SHDN pin and SHDNx pins can be driven beyond the +VS

supply up to the absolute maximum voltage (60 V with respect to

−VS) and draw little current (<2.5 μA). For normal active amplifier

operation, the SHDN pin and SHDNx pins can be floated or driven

by an external low voltage source (within 0.5 V of −VS). If the SHDN

pin and SHDNx pins are left floating, an internal current source

(~600 nA) pulls these pins to –VS, which places the amplifiers into

a default, active amplifying state. Because of the close proximity

of the −IN pin (ADA4097-1) and −INx pins (ADA4097-2) and the

SHDN pin and SHDNx pins, respectively, fast edges on the −IN pin

and −INx pins can ac-couple to the adjacent high impedance SHDN

pin and SHDNx pins, inadvertently placing the devices in shutdown.

If this scenario is a concern, add a 1 nF capacitor between the

SHDN pin and SHDNx pins and the −VS pin.

Alternatively, the amplifiers can be effectively placed in a low power

state by removing +VS. In this low power state, the inputs typically

leak <1 nA with either the ±IN pins (ADA4097-1) or ±INx pins

(ADA4097-2) biased between −VS and 70 V above −VS. If the ±IN

pins and ±INx pins are taken below −VS, these pins appear as a

diode connected to the −VS supply in series with a resistance of

880 Ω. In this condition, limit the current to <10 mA.

Using an external source to drive the output beyond either ±VS

supply under shutdown conditions can produce unlimited current

and can damage the devices.

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