ADA4097-1BUJZ-R5 datasheet(8/31 Pages) AD

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Data Sheet

ADA4097-1/ADA4097-2

ABSOLUTE MAXIMUM RATINGS

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Rev. A | 8 of 31

Table 3.

Parameter

Rating

Supply Voltage1

Transient

60 V

Continuous

50 V

Power Dissipation (PD)

See Figure 3

Differential Input Voltage

±80 V

±IN and ±INx Pin Voltage2

Continuous

−10 V to +80 V

Survival

−15 V to +80 V

±IN and ±INx Pin Current2

10 mA

SHDN and SHDNx Pin Voltage3

−0.3 V to +60 V

Storage Temperature Range

−65°C to +150°C

Operating Temperature Range

−55°C to +150°C

Lead Temperature (Soldering, 10 sec)

300°C

175°C

1 Maximum supply voltage is limited by the TDDB of the on-chip capacitor ox-

ides. The amplifiers tolerate temporary transient overshoot up to the specified

transient maximum rating. The continuous operating supply voltage must be

limited to no more than 50 V.

2 ±IN refers to the +IN and −IN pins on the ADA4097-1, and ±INx refers to the

+IN1, −IN1, +IN2, and −IN2 pins on the ADA4097-2.

3 SHDN is Pin 5 on the ADA4097-1, and SHDNx refers to the SHDN1 and

SHDN2 pins (Pin 5 and Pin 6, respectively) on the ADA4097-2 (10-lead

LFCSP).

Stresses at or above those listed under Absolute Maximum Ratings

may cause permanent damage to the device. This is a stress rating

only; functional operation of the product at these or any other

conditions above those indicated in the operational section of this

specification is not implied. Operation beyond the maximum operat-

ing conditions for extended periods may affect product reliability.

TJ exceeding 125°C promotes accelerated aging. The ADA4097-1/

ADA4097-2 demonstrate ±25 V supply operation beyond 1000

hours at TA = 150°C.

MAXIMUM POWER DISSIPATION

The maximum safe PD on the devices is limited by the associated

rise in either TC or TJ on the die. At approximately TC = 150°C,

which is the glass transition temperature, the properties of the

plastic changes. Exceeding this temperature limit, even temporarily,

may change the stresses that the package exerts on the die, which

permanently shifts the parametric performance of the ADA4097-1/

ADA4097-2. Exceeding TJ = 175°C for an extended period may

result in changes in the silicon devices and may potentially cause

failure of the devices.

The PD on the package is the sum of the quiescent power dissipa-

tion and the power dissipated in the package due to the output load

drive. The quiescent power is expressed as VSY × ISY, where ISY is

the quiescent current.

The PD due to the load drive depends on the application. The PD

due to load drive is calculated by multiplying the load current by

the associated voltage drop across the devices. RMS voltages and

currents must be used in these calculations.

Airflow increases heat dissipation, effectively reducing θJA. Addi-

tional metal that is directly in contact with the package leads from

metal traces through vias, ground, and power planes reduces θJA.

Figure 3 shows the maximum PD vs. TA for the single 6-lead TSOT

package on a JEDEC standard, 4‑layer board, with −VS connected

to a pad that is thermally connected to a printed circuit board (PCB)

plane. θJA values are approximations.

Figure 3. Maximum Power Dissipation vs. Ambient Temperature

THERMAL RESISTANCE

Thermal performance is directly linked to PCB design and operating

environment. Careful attention to PCB thermal design is required.

θJA is the junction to ambient thermal resistance, and θJC is the

junction-to-case thermal resistance.

Table 4. Thermal Resistance

Package Type

θJA

θJC

Unit

UJ-6

192

°C/W

R-8

120

°C/W

RM-8

163

°C/W

05-08-1699

5.5

°C/W

ELECTROSTATIC DISCHARGE (ESD) RATINGS

The following ESD information is provided for handling of ESD-sen-

sitive devices in an ESD protected area only.

Human body model (HBM) per ANSI/ESDA/JEDEC JS-001.

Field induced charged device model (FICDM) per ANSI/ESDA/JE-

DEC JS-002.

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