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SPC572L64F2 датащи(PDF) 69 Page - STMicroelectronics |
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SPC572L64F2 датащи(HTML) 69 Page - STMicroelectronics |
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69 / 112 page ![]() DocID027866 Rev 5 69/112 SPC572Lx Electrical characteristics 111 2. Actual hardware programming times; this does not include software overhead. 3. Typical program and erase times assume nominal supply values and operation at 25 °C. All times are subject to change pending device characterization. 4. Typical End of Life program and erase times represent the median performance and assume nominal supply values. Typical End of Life program and erase values may be used for throughput calculations. These values are characteristic, but not tested. 5. Lifetime maximum program & erase times apply across the voltages and temperatures and occur after the specified number of program/erase cycles. These maximum values are characterized but not tested or guaranteed. 6. Initial factory condition: < 100 program/erase cycles, 20 °C < TJ < 30 °C junction temperature, and nominal (± 2%) supply voltages. These values are verified at production testing. 7. Initial maximum “All temp” program and erase times provide guidance for time-out limits used in the factory and apply for less than or equal to 100 program or erase cycles, –40 °C < TJ < 150 °C junction temperature, and nominal (± 2%) supply voltages. These values are verified at production testing. 8. Rate computed based on 256K sectors. 9. Only code sectors, not including EEPROM. 10. Time between erase suspend resume and next erase suspend. 11. Timings guaranteed by design. 12. AIC is done using system clock, thus all timing is dependant on system frequency and number of wait states. Timing in the table is calculated at 160 MHz. Table 37. Flash memory module extended life specification(1) Symbol C Parameter Conditions Value Unit Min Typ Max P/E16 CC C Number of program/erase cycles per block for 16 KB EEPROM emulation (2) — 100,000 — — P/E cycles P/E256 CC C Number of program/erase cycles per block for 256 KB blocks(2) — 1000 100,000 — P/E cycles Data retention CC C Minimum data retention Blocks with 0 – 10000 P/E cycles 20 — — years Blocks with 10001– 250000 P/E cycles. Data Retention limited to 2, in total, 16 KB sectors within module 1 10 — — 1. All stated module life data are preliminary targets, and subject to change pending silicon characterization. 2. Program and Erase supported for standard operating temperature range. |
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