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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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MCF5373CAB180 датащи(PDF) 32 Page - NXP Semiconductors |
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MCF5373CAB180 датащи(HTML) 32 Page - NXP Semiconductors |
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32 / 46 page  MCF537x ColdFire® Microprocessor Data Sheet, Rev. 4 Electrical Characteristics Freescale Semiconductor 32 Figure 19. MII Transmit Signal Timing Diagram 5.13.3 MII Async Inputs Signal Timing Table 20 lists MII asynchronous inputs signal timing. Figure 20. MII Async Inputs Timing Diagram 5.13.4 MII Serial Management Channel Timing Table 21 lists MII serial management channel timings. The FEC functions correctly with a maximum MDC frequency of 2.5 MHz. Table 20. MII Async Inputs Signal Timing Num Characteristic Min Max Unit M9 FEC_CRS, FEC_COL minimum pulse width 1.5 — FEC_TXCLK period Table 21. MII Serial Management Channel Timing Num Characteristic Min Max Unit M10 FEC_MDC falling edge to FEC_MDIO output invalid (minimum propagation delay) 0— ns M11 FEC_MDC falling edge to FEC_MDIO output valid (max prop delay) — 25 ns M12 FEC_MDIO (input) to FEC_MDC rising edge setup 10 — ns M13 FEC_MDIO (input) to FEC_MDC rising edge hold 0 — ns M14 FEC_MDC pulse width high 40% 60% FEC_MDC period M15 FEC_MDC pulse width low 40% 60% FEC_MDC period M6 FEC_TXCLK (input) FEC_TXD[3:0] (outputs) FEC_TXEN FEC_TXER M5 M7 M8 FEC_CRS M9 FEC_COL |
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