AT45DB021E datasheet(17/74 Pages) DIALOG

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AT45DB021E

DS-AT45DB021E—8789J—03/2021

10 page address bits (PA9 - PA0) that specify the page in the main memory to be written, and eight address bits

(A7 - A0) that selects the first byte in the Buffer to be written. After all address bytes are clocked in, the device

takes data from the input pin (SI) and stores it in the Buffer. Any number of bytes (1 to 256) can be entered. If the

end of the Buffer is reached, then the device wraps around back to the beginning of the Buffer. When using the

binary page size, the page and buffer address bits correspond to an 18-bit logical address (A17-A0) in the main

memory.

After all data bytes have been clocked into the device, a low-to-high transition on the CS pin starts the program

operation in which the device programs the data stored in the Buffer into the main memory array. Only the data

bytes that were clocked into the device are programmed into the main memory.

Example:

If only two data bytes were clocked into the device, then only two bytes are programmed into main memory,

and the remaining bytes in the memory page remain in their previous state.

The CS pin must be deasserted on a byte boundary (multiples of eight bits); otherwise, the operation is aborted

and no data are programmed. Programming data bytes is internally self-timed and takes place in a maximum time

of tP (the program time is a multiple of the tBP time depending on the number of bytes being programmed). During

this time, the RDY/BUSY bit in the Status Register indicates that the device is busy.

The device also incorporates an intelligent programming algorithm that can detect when a byte location fails to

program properly. If a programming error arises, it is indicated by the EPE bit in the Status Register.

7.6

Page Erase

The Page Erase command can be used to individually erase any page in the main memory array allowing the

Buffer to Main Memory Page Program without Built-In Erase command or the Main Memory Byte/Page Program

through Buffer command to be used later.

To perform a Page Erase with the standard DataFlash page size (264 bytes), an opcode of 81h must be clocked

into the device followed by three address bytes comprised of five dummy bits, 10 page address bits (PA9 - PA0)

that specify the page in the main memory to be erased, and nine dummy bits.

To perform a Page Erase with the binary page size (256 bytes), an opcode of 81h must be clocked into the device

followed by three address bytes comprised of six dummy bits, 10 page address bits (A17 - A8) that specify the

page in the main memory to be erased, and eight dummy bits.

When a low-to-high transition occurs on the CS pin, the device erases the selected page (the erased state is a

logic 1). The erase operation is internally self-timed and takes place in a maximum time of tPE. During this time, the

RDY/BUSY bit in the Status Register indicates that the device is busy.

The device also incorporates an intelligent erase algorithm that can detect when a byte location fails to erase

properly. If an erase error arises, it is indicated by the EPE bit in the Status Register.

7.7

Block Erase

The Block Erase command can be used to erase a block of eight pages at one time. This command is useful when

needing to pre-erase larger amounts of memory and is more efficient than issuing eight separate Page Erase

commands.

To perform a Block Erase with the standard DataFlash page size (264 bytes), an opcode of 50h must be clocked

into the device followed by three address bytes comprised of five dummy bits, seven page address bits (PA9 -

PA3), and 12 dummy bits. The seven page address bits are used to specify which block of eight pages is to be

erased.

To perform a Block Erase with the binary page size (256 bytes), an opcode of 50h must be clocked into the device

followed by three address bytes comprised of six dummy bits, seven page address bits (A17 - A11), and 11 dummy

bits. The seven page address bits are used to specify which block of eight pages is to be erased.

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