AT45DB021E datasheet(11/74 Pages) DIALOG

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AT45DB021E

DS-AT45DB021E—8789J—03/2021

Device Operation

The device operation is controlled by instructions from the host processor. The list of instructions and their

associated opcodes are contained in Table 16-1, on page 43, through Table 16-4, on page 44. A valid instruction

starts with the falling edge of CS followed by the appropriate 8-bit opcode and the Buffer or main memory address

location. While the CS pin is low, toggling the SCK pin controls the loading of the opcode and the Buffer or main

memory address location through the SI (Serial Input) pin. All instructions, addresses, and data are transferred with

the Most Significant Bit (MSB) first.

Three address bytes are used to address memory locations in either the main memory array or in the Buffer. The

three address bytes are comprised of a number of dummy bits and a number of actual device address bits, with the

number of dummy bits varying depending on the operation being performed and the selected device page size.

Buffer addressing for the standard DataFlash page size (264 bytes) is referenced in the datasheet using the

terminology BFA8 - BFA0 to denote the nine address bits required to designate a byte address within the Buffer.

The main memory addressing is referenced using the terminology PA9 - PA0 and BA8 - BA0, where PA9 - PA0

denotes the 10 address bits required to designate a page address, and BA8 - BA0 denotes the nine address bits

required to designate a byte address within the page. Therefore, when using the standard DataFlash page size, a

total of 22 address bits are used.

For the “power of 2” binary page size (256 bytes), the Buffer addressing is referenced in the datasheet using the

conventional terminology BFA7 - BFA0 to denote the eight address bits required to designate a byte address within

the Buffer. Main memory addressing is referenced using the terminology A17 - A0, where A17 - A8 denotes the 10

address bits required to designate a page address, and A7 - A0 denotes the eight address bits required to

designate a byte address within a page. Therefore, when using the binary page size, a total of 21 address bits are

used.

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