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M69KB096AA

2. These timings have been obtained with the AC Measurement Load Circuit shown on Figure 14. The transition timings measure a

3. These timings have been obtained with the AC Measurement Load Circuit shown on Figure 14. The High-Z timings measure a tran-

Figure 30. Synchronous Burst Write AC Waveform

Note: 1. Non default BCR Register settings: Latency code two (three clocks); WAIT active Low; WAIT asserted during delay.

Chip Enable High to WAIT Hi-Z

LB/UB High to WAIT Hi-Z

Write Enable High to WAIT Hi-Z

88

ns

Symbol

Alt.

Parameter

M69KB096AA

Unit

70ns

85ns

Min

Max

Min

Max

Address Setting Time

0

0

µs

L High to Address Transition

5

5

ns

A0-A21

WAIT

D0-D15

K

tKHKH

VALID

ADDRESS

tKHDX

tELKH

tWHKH

tKHWH

tAVKH

WRITE Burst Identified

tKHTV

Hi-Z

VALID

INPUT

Hi-Z

Hi-Z

AI06792b

E

G

W

(W = Low)

tKHEH

tEHEL

tBLKH

tKHBH

LB/UB

tELTV

tDVKH

L

VALID

INPUT

VALID

INPUT

VALID

INPUT

tELEH

tLLKH

tKHLH