INA228 datasheet(19/50 Pages) TI

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7.5 Programming

7.5.1 I2C Serial Interface

The INA228-Q1 operates only as a secondary device on both the SMBus and I2C interfaces. Connections

to the bus are made through the open-drain SDA and SCL lines. The SDA and SCL pins feature integrated

spike suppression filters and Schmitt triggers to minimize the effects of input spikes and bus noise. Although

the device integrates spike suppression into the digital I/O lines, proper layout techniques help minimize the

amount of coupling into the communication lines. This noise introduction could occur from capacitive coupling

signal edges between the two communication lines themselves or from other switching noise sources present

in the system. Routing traces in parallel with ground in between layers on a printed-circuit board (PCB) typically

reduces the effects of coupling between the communication lines. Shielded communication lines reduce the

possibility of unintended noise coupling into the digital I/O lines that could be incorrectly interpreted as start or

stop commands.

The INA228-Q1 supports the transmission protocol for fast mode (1 kHz to 400 kHz) and high-speed mode (1

kHz to 2.94 MHz). All data bytes are transmitted most significant byte first and follow the SMBus 3.0 transfer

protocol.

To communicate with the INA228-Q1, the main device must first address secondary devices through a

secondary device address byte. The secondary device address byte consists of seven address bits and a

direction bit that indicates whether the action is to be a read or write operation.

The device has two address pins, A0 and A1. Table 7-2 lists the pin logic levels for each of the 16 possible

addresses. The device samples the state of pins A0 and A1 on every bus communication. Establish the pin

states before any activity on the interface occurs. When connecting the SDA pin to either A0 or A1 to set the

device address, additional hold time of 100 ns is needed on the MSB of the I2C address to insure correct device

addressing.

Table 7-2. Address Pins and Secondary Device Addresses

Secondary Device Address

GND

1000000

GND

1000001

GND

SDA

1000010

GND

SCL

1000011

GND

1000100

1000101

SDA

1000110

SCL

1000111

SDA

GND

1001000

SDA

1001001

SDA

1001010

SDA

SCL

1001011

SCL

GND

1001100

SCL

1001101

SCL

SDA

1001110

SCL

1001111

7.5.1.1 Writing to and Reading Through the I2C Serial Interface

Accessing a specific register on the INA228-Q1 is accomplished by writing the appropriate value to the register

pointer. Refer to Section 7.6 for a complete list of registers and corresponding addresses. The value for the

the R/W bit low. Every write operation to the device requires a value for the register pointer.

www.ti.com

INA228-Q1

SLYS022A – JUNE 2020 – REVISED JUNE 2021

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