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INA228 датащи(PDF) 17 Page - Texas Instruments |
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INA228 датащи(HTML) 17 Page - Texas Instruments |
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17 / 50 page ![]() 7.3.6 Integrated Precision Oscillator The internal timebase of the device is provided by an internal oscillator that is trimmed to less than 0.5% tolerance at room temperature. The precision oscillator is the timing source for ADC conversions, as well as the time-count used for calculation of energy and charge. The digital filter response varies with conversion time; therefore, the precise clock ensures filter response and notch frequency consistency across temperature. On power up, the internal oscillator and ADC take roughly 300 µs to reach <1% error stability. Once the clock stabilizes, the ADC data output will be accurate to the electrical specifications provided in Section 6. 7.3.7 Multi-Alert Monitoring and Fault Detection The INA228-Q1 includes a multipurpose, open-drain ALERT output pin that can be used to report multiple diagnostics or as an indicator that the ADC conversion is complete when the device is operating in both triggered and continuous conversion mode. The diagnostics listed in Table 7-1 are constantly monitored and can be reported through the ALERT pin whenever the monitored output value crosses its associated out-of-range threshold. Table 7-1. ALERT Diagnostics Description INA228-Q1 DIAGNOSTIC STATUS BIT IN DIAG_ALRT REGISTER (RO) OUT-OF-RANGE THRESHOLD REGISTER (R/W) REGISTER DEFAULT VALUE Shunt Under Voltage Limit SHNTUL SUVL 0x8000 h (two's complement) Shunt Over Voltage Limit SHNTOL SOVL 0x7FFF h (two's complement) Bus Voltage Over-Limit BUSOL BOVL 0x7FFF h (two's complement, positive values only) Bus Voltage Under-Limit BUSUL BUVL 0x0000 h (two's complement, positive values only) Temperature Over-Limit TMPOL TEMP_LIMIT 0xFFFF h (two's complement, positive values only) Power Over-Limit POL PWR_LIMIT 0x7FFF h (two's complement) A read of the DIAG_ALRT register is used to determine which diagnostic has triggered the ALERT pin. This register, shown in Table 7-16, is also used to monitor other associated diagnostics as well as configure some ALERT pin functions. • Alert latch enable — In case the ALERT pin is triggered, this function will hold the value of the pin even after all diagnostic conditions have cleared. A read of the DIAG_ALRT register will reset the status of the ALERT pin. This function is enabled by setting the ALATCH bit. • Conversion ready enable — Enables the ALERT pin to assert when an ADC conversion has completed and output values are ready to be read through the digital interface. This function is enabled by setting the CNVR bit. The conversion completed events can also be read through the CNVRF bit regardless of the CNVR bit setting. • Alert comparison on averaged output — Allows the out-of-range threshold value to be compared to the averaged data values produced by the ADC. This helps to additionally remove noise from the output data when compared to the out-of-range threshold to avoid false alerts due to noise. However, the diagnostic will be delayed due to the time needed for averaging. This function is enabled by setting the SLOWALERT bit. • Alert polarity — Allows the device to invert the active state of the ALERT pin. Note that the ALERT pin is an open-drain output that must be pulled-up by a resistor. The ALERT pin is active-low by default and can be configured for active high function using the APOL control bit. Other diagnostic functions that are not reported by the ALERT pin but are available by reading the DIAG_ALRT register: www.ti.com INA228-Q1 SLYS022A – JUNE 2020 – REVISED JUNE 2021 Copyright © 2021 Texas Instruments Incorporated Submit Document Feedback 17 Product Folder Links: INA228-Q1 |
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