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When setting the power over-limit value, the LSB size used to calculate the value needed in the limit registers

will be 256 times greater than the power LSB. This is because the power register is a 24 bits in length while the

power fault limit register is 16 bits.

Values stored in the alert limit registers are set to the default values after VS power cycle events and need to be

reprogrammed each time power is applied.

8.2.2.5 Calculate Returned Values

Parametric values are calculated by multiplying the returned value by the LSB value. Table 8-4 below shows the

returned values for this application example assuming the design requirements shown in Table 8-3.

Table 8-4. Calculating Returned Values

PARAMETER

Returned Value

LSB Value

Calculated Value

Shunt voltage (V)

311040d

312.5 nV/LSB

0.0972 V

Current (A)

314572d

10 A/ 219 = 19.073486 µA/LSB

6 A

Bus voltage (V)

245760d

195.3125 µV/LSB

48 V

Power (W)

4718604d

Current LSB x 3.2 = 61.035156 µW/LSB

288 W

Energy (J)

1061683200d

Power LSB x 16 = 976.5625 µJ/LSB

1036800 J

Charge (C)

1132462080d

Current LSB = 19.073486 µC/LSB

21600 C

Temperature (°C)

3200d

7.8125 m°C/LSB

25°C

Shunt Voltage, Current, Bus Voltage (positive only), Charge, and Temperature return values in two's complement

format. In two's complement format a negative value in binary is represented by having a 1 in the most

significant bit of the returned value. These values can be converted to decimal by first inverting all the bits

and adding 1 to obtain the unsigned binary value. This value should then be converted to decimal with the

negative sign applied. For example, assume a shunt voltage reading returns 1011 0100 0001 0000 0000. This is

a negative value due to the MSB having a value of one. Inverting the bits and adding one results in 0100 1011

1111 0000 0000 (311040d) which from the shunt voltage example in Table 8-4 correlates to a voltage of 97.2 mV.

Since the returned value was negative the measured shunt voltage value is -97.2 mV.

8.2.3 Application Curves

Figure 8-3 and Figure 8-4 show the ALERT pin response to a bus overvoltage fault with a conversion time of

50 μs, averaging set to 1, and the SLOWALERT bit set to 0 for bus only conversions. For these scope shots,

persistence was enabled on the ALERT channel to show the variation in the alert response for many sequential

fault events. If the magnitude of the fault is sufficient the ALERT response can be as fast as one quarter of the

ADC conversion time as shown in Figure 8-3. For fault conditions that are just exceeding the limit threshold,

the response time for the ALERT pin can vary from approximately 0.5 to 1.5 conversion cycles as shown in

Figure 8-4. Variation in the alert response exists because the external fault event is not synchronized to the

internal ADC conversion start. Also the ADC is constantly sampling to get a result, so the response time for fault

events starting from zero will slower than fault events starting from values near the set fault threshold. Since the

timing of the alert can be difficult to predict, applications where the alert timing is critical should assume a alert

response equal to 1.5 times the ADC conversion time for bus voltage or shunt voltage only conversions.

www.ti.com

INA228-Q1

SLYS022A – JUNE 2020 – REVISED JUNE 2021

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