ADA4097-1BUJZ-R5 datasheet(19/27 Pages) AD

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Data Sheet

ADA4097-1

Rev. 0 | Page 19 of 27

INPUT PROTECTION

The inputs are protected against temporary voltage excursions

to 15 V below –VS (see Figure 54) by internal 880 Ω resistors

(see Figure 53). These resistors limit the current in the series

D1 diode and D2 diode that are tied to the bases of the Q1 and

Q2 transistors, respectively. Adding additional external series

resistance extends the protection to >15 V below −VS, at the

cost of stability and added thermal noise. The input stage of the

ADA4097-1 incorporates phase reversal protection to prevent

the output from phase reversing for inputs below −VS. The

ADA4097-1 op amp does not have clamping diodes between the

inputs and can be differentially overdriven up to 80 V without

damage, inducing parametric shifts, or drawing appreciable input

current. Figure 55 summarizes the input fault types that can be

applied to the ADA4097-1 without compromising input integrity.

TIME (400ms/DIV)

VSY = 5V

VOUT

VIN

Figure 54. ADA4097-1 as Unity-Gain Buffer with Noninverting Input Driven

Beyond the Supply (VSY = 5 V)

80V

OK!

LARGE DIFFERENTIAL

INPUT VOLTAGE

TOLERANT

80V

OK!

INPUTS DRIVEN

ABOVE THE SUPPLY

TOLERANT

80V

OK!

LARGE DIFFERENTIAL

INPUT VOLTAGE

TOLERANT

–5V

OK!

INPUTS DRIVEN

BELOW GROUND

TOLERANT

Figure 55. ADA4097-1 Fault Tolerant Conditions

OVER-THE-TOP OPERATION CONSIDERATIONS

When the ADA4097-1 input common-mode is biased near or

>+VS supply, the amplifier operates in the Over-The-Top

configuration. The differential input pair that controls amplifier

operation is the common base pair, Q3 to Q6 (see Figure 53).

Input bias currents change from<±0.3 nA in normal operation

to approximately 0.8 μA in Over-The-Top operation when the

input stage transitions from common emitter to common base.

The Over-The-Top input bias currents are well matched, and the

associated offset is typically <50 nA. Ensure that the impedance

connected to the inverting and noninverting inputs is well matched

to avoid any input bias current induced voltage offsets.

Differential input impedance, RIN (see Figure 56), decreases

from >10 MΩ in normal operation to ~60 kΩ in Over-The-Top

operation (see Table 1 and Table 2).

RIN

VIN

VINCM

Figure 56. Difference Amplifier Configured for Normal Operation and

Over-The-Top Operation (RI Is a Gain Setting Resistor)

This RIN resistance appears across the summing nodes in Over-

The-Top operation due to the configuration of the common

base input stage.

The RIN value is derived from the specified IB that flows to the

op amp inputs, as expressed in the following equation:

RIN = 2kT/(qIB)

where:

k is Boltzmann’s constant.

T is the operating temperature.

q is the charge of an electron.

IB is the operating input bias current in Over-The-Top

operation.

The inputs are biased proportional to absolute temperature.

Therefore, RIN is relatively constant with temperature. This

resistance appears across the summing nodes of the amplifier,

which is forced to 0 V differentially by the feedback action of

the amplifier and can seem relatively harmless. However,

depending on the configuration, this input resistance can boost

the noise gain, lower overall amplifier loop gain and closed-

loop bandwidth, and raise output noise. The singular benefit of

this configuration is an increase in closed-loop amplifier stability.

In normal mode (−VS < VCM < +VS −1 V), RIN is typically large

compared to the value of the gain setting resistors (RF and RI),

and RIN can be ignored.

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