ADA4097-1BUJZ-R5 datasheet(18/27 Pages) AD

18 / 27 page

ADA4097-1

Data Sheet

Rev. 0 | Page 18 of 27

THEORY OF OPERATION

The ADA4097-1 is a robust, voltage feedback amplifier that

combines unity-gain stability with low offset, low offset drift, and

53 nV/√Hz of input voltage noise. Figure 53 shows a simplified

schematic of the device. The ADA4097-1 has two input stages:

a common emitter differential input stage consisting of the Q1

and Q2 PNP transistors that operate with the inputs biased

between −VS and 1 V below +VS, and a common base input

stage that consists of the Q3 to Q6 PNP transistors that operate

when the common-mode input is biased >+VS − 1 V. These input

stages result in two distinct operating regions, as shown in

Figure 51.

VSY = 5V

INPUT COMMON-MODE VOLTAGE (V)

3.0

3.5

4.0

4.5

5.0

0.0001

0.001

0.01

0.1

TA = –55°C

TA = +25°C

TA = +125°C

TA = +150°C

Figure 51. Input Bias Current vs. Input Common-Mode Voltage over

Temperature, VSY = 5 V

For common-mode input voltages that are approximately 1 V

below the +VS supply, where Q1 and Q2 are active (see Figure 51),

the common emitter PNP input stage is active and the input bias

current is typically <0.3 nA. When the common-mode input is

above +VS − 1 V, the Q9 transistor turns on, which diverts bias

current away from the common emitter differential input pair

to the mirror that consists of M3 and M4. The current from M4

biases the common base differential input pair (Q3 to Q6). The

Over-The-Top input pair operates in a common base configuration

and the input bias current increases to ~0.8 μA. The offset

voltages of both input stages are tightly trimmed and are

specified in Table 1 and Table 2.

As the input common-mode transitions to the Over-The-Top

region, the input CMRR degrades slightly when compared to

the rest of the input common-mode range, as shown in Figure 52.

VSY = 5V

INPUT COMMON-MODE VOLTAGE (V)

3.0

3.5

4.0

4.5

5.0

–200

–150

–100

–50

100

150

200

TA = –55°C

TA = +25°C

TA = +125°C

TA = +150°C

Figure 52 . Offset Voltage vs. Input Common-Mode Voltage over

Temperature, VSY = 5 V

880Ω

0.85µA

1µA

–IN

+IN

–VS

+VS

Q2 Q1

PNP

Q10

PNP

NJF

ESD

NMOS

PNP

NPN

SHDN

OUTPUT

DRIVER

NPN

Q13

NPN

ESD

OUT

ESD

PMOS

PNP

2MΩ

100kΩ

40kΩ

Figure 53. Simplified ADA4097-1 Schematic

ADA4097-1BUJZ-R5 датащи(PDF) 18 Page - Analog Devices

ADA4097-1BUJZ-R5 датащи(HTML) 18 Page - Analog Devices

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27

датащи скачать

ссылки URL