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ADA4097-1BUJZ-R5 датащи(PDF) 9 Page - Analog Devices

номер детали ADA4097-1BUJZ-R5
подробное описание детали  50 V, 130 kHz, 32.5 關A, Robust, Over-The-Top Precision Op Amp
PDF  27 Pages
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производитель  AD [Analog Devices]
домашняя страница  http://www.analog.com
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ADA4097-1BUJZ-R5 датащи(HTML) 9 Page - Analog Devices

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Data Sheet
ADA4097-1
Rev. 0 | Page 9 of 27
PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
1
3
2
VOUT
+IN
–VS
6
4
5
+VS
–IN
SHDN
TOP VIEW
(Not to Scale)
ADA4097-1
Figure 4. Pin Configuration
Table 6. Pin Function Descriptions
Pin No.
Mnemonic
Description
1
VOUT
Amplifier Output.
2
−VS
Negative Power Supply. In single-supply applications, the −VS pin is normally soldered to a low impedance ground
plane. In split-supply applications, bypass the −VS pin with a capacitance of at least 0.1 μF to a low impedance
ground plane, as close to the −VS pin as possible.
3
+IN
Noninverting Input of the Amplifier.
4
−IN
Inverting Input of the Amplifier.
5
SHDN
Op Amp Shutdown. The threshold for shutdown is approximately 1 V above the negative supply. If the SHDN pin is
not connected or hard tied to −VS, the amplifier is active. If the SHDN pin is asserted high (VSHDN > −VS + 1.5 V), the
amplifier is placed in a shutdown state, and the output of the amplifier goes to a high impedance state. If the SHDN
pin is left unconnected, it is recommended to connect a small capacitor of 1 nF between the SHDN pin and the −VS
pin to prevent signals from the −IN pin from capacitively coupling to the SHDN pin.
6
+VS
Positive Power Supply. Bypass the +VS pin with a capacitance of at least 0.1 μF to a low impedance ground plane, as
close to the +VS pin as possible.



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