ATMEGA640 datasheet(51/436 Pages) MICROCHIP

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ATmega640/V-1280/V-1281/V-2560/V-2561/V [DATASHEET]

DS40002211A

11.3 ADC Noise Reduction Mode

When the SM2:0 bits are written to 001, the SLEEP instruction makes the MCU enter ADC Noise Reduction mode,

stopping the CPU but allowing the ADC, the external interrupts, 2-wire Serial Interface address match,

Timer/Counter2 and the Watchdog to continue operating (if enabled). This sleep mode basically halts clkI/O, clk-

CPU, and clkFLASH, while allowing the other clocks to run.

This improves the noise environment for the ADC, enabling higher resolution measurements. If the ADC is

enabled, a conversion starts automatically when this mode is entered. Apart form the ADC Conversion Complete

interrupt, only an External Reset, a Watchdog System Reset, a Watchdog interrupt, a Brown-out Reset, a 2-wire

serial interface interrupt, a Timer/Counter2 interrupt, an SPM/EEPROM ready interrupt, an external level interrupt

on INT7:4 or a pin change interrupt can wakeup the MCU from ADC Noise Reduction mode.

11.4 Power-down Mode

When the SM2:0 bits are written to 010, the SLEEP instruction makes the MCU enter Power-down mode. In this

mode, the external Oscillator is stopped, while the external interrupts, the 2-wire Serial Interface, and the Watch-

dog continue operating (if enabled). Only an External Reset, a Watchdog Reset, a Brown-out Reset, 2-wire Serial

Interface address match, an external level interrupt on INT7:4, an external interrupt on INT3:0, or a pin change

interrupt can wake up the MCU. This sleep mode basically halts all generated clocks, allowing operation of asyn-

chronous modules only.

Note that if a level triggered interrupt is used for wake-up from Power-down mode, the changed level must be held

for some time to wake up the MCU. Refer to “External Interrupts” on page 109 for details.

When waking up from Power-down mode, there is a delay from the wake-up condition occurs until the wake-up

becomes effective. This allows the clock to restart and become stable after having been stopped. The wake-up

period is defined by the same CKSEL Fuses that define the Reset Time-out period, as described in “Clock

Sources” on page 40.

11.5 Power-save Mode

When the SM2:0 bits are written to 011, the SLEEP instruction makes the MCU enter Power-save mode. This

mode is identical to Power-down, with one exception:

If Timer/Counter2 is enabled, it will keep running during sleep. The device can wake up from either Timer Overflow

or Output Compare event from Timer/Counter2 if the corresponding Timer/Counter2 interrupt enable bits are set in

TIMSK2, and the Global Interrupt Enable bit in SREG is set. If Timer/Counter2 is not running, Power-down mode is

recommended instead of Power-save mode.

The Timer/Counter2 can be clocked both synchronously and asynchronously in Power-save mode. If the

Timer/Counter2 is not using the asynchronous clock, the Timer/Counter Oscillator is stopped during sleep. If the

Timer/Counter2 is not using the synchronous clock, the clock source is stopped during sleep. Note that even if the

synchronous clock is running in Power-save, this clock is only available for the Timer/Counter2.

11.6 Standby Mode

When the SM2:0 bits are 110 and an external crystal/resonator clock option is selected, the SLEEP instruction

makes the MCU enter Standby mode. This mode is identical to Power-down with the exception that the Oscillator is

kept running. From Standby mode, the device wakes up in six clock cycles.

11.7 Extended Standby Mode

When the SM2:0 bits are 111 and an external crystal/resonator clock option is selected, the SLEEP instruction

makes the MCU enter Extended Standby mode. This mode is identical to Power-save mode with the exception that

the Oscillator is kept running. From Extended Standby mode, the device wakes up in six clock cycles.

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