| поискавой системы для электроныых деталей |
|
STM32G031F6 датащи(PDF) 16 Page - STMicroelectronics |
|
|
|||||||||||||||||||||||||||||
STM32G031F6 датащи(HTML) 16 Page - STMicroelectronics |
|
16 / 117 page ![]() Functional overview STM32G031x4/x6/x8 16/117 DS12992 Rev 2 • VDDIO1 = VDD VDDIO1 is the power supply for the I/Os. VDDIO1 voltage level is identical to VDD voltage as it is provided externally through VDD/VDDA pin. • VBAT = 1.55 V to 3.6 V. VBAT is the power supply (through a power switch) for RTC, TAMP, low-speed external 32.768 kHz oscillator and backup registers when VDD is not present. VBAT is provided externally through VBAT pin. When this pin is not available on the package, VBAT bonding pad is internally bonded to the VDD/VDDA pin. • VREF+ is the analog peripheral input reference voltage, or the output of the internal voltage reference buffer (when enabled). When VDDA < 2 V, VREF+ must be equal to VDDA. When VDDA ≥ 2 V, VREF+ must be between 2 V and VDDA. It can be grounded when the analog peripherals using VREF+ are not active. The internal voltage reference buffer supports two output voltages, which is configured with VRS bit of the VREFBUF_CSR register: –VREF+ around 2.048 V (requiring VDDA equal to or higher than 2.4 V) –VREF+ around 2.5 V (requiring VDDA equal to or higher than 2.8 V) VREF+ is delivered through VREF+ pin. On packages without VREF+ pin, VREF+ is internally connected with VDD, and the internal voltage reference buffer must be kept disabled (refer to datasheets for package pinout description). • VCORE An embedded linear voltage regulator is used to supply the VCORE internal digital power. VCORE is the power supply for digital peripherals, SRAM and Flash memory. The Flash memory is also supplied with VDD. Figure 2. Power supply overview MSv47940V1 VDDA domain RTC domain A/D converter Standby circuitry (Wakeup logic, IWDG) Voltage regulator Core SRAM Digital peripherals Low-voltage detector LSE crystal 32.768 KHz osc BKP registers RCC BDCR register RTC Voltage reference buffer I/O ring VCORE domain Temp. sensor Reset block PLL, HSI Flash memory VDDIO1 VREF+ VDD domain VCORE VSS VDD VBAT VDDA VREF+ VSSA VSS VDD |
|
ссылки URL |
| Вашему бизинису помогли Аллдатащит? [ DONATE ] |
Что такое Аллдатащит | реклама | контакт | Конфиденциальность | Ссылка на техническое описание | обмен ссыками | поиск по производителю All Rights Reserved©Alldatasheet.com |
| Russian : Alldatasheetru.com | Korean : Alldatasheet.co.kr | Spanish : Alldatasheet.es | French : Alldatasheet.fr | Italian : Alldatasheetit.com Portuguese : Alldatasheetpt.com | Polish : Alldatasheet.pl | Vietnamese : Alldatasheet.vn Indian : Alldatasheet.in | Mexican : Alldatasheet.com.mx | British : Alldatasheet.co.uk | New Zealand : Alldatasheet.co.nz |
|
Family Site : ic2ic.com |
icmetro.com |