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поискавой системы для электроныых деталей |
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поискавой системы для электроныых деталей |
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W6100 датащи(PDF) 18 Page - WIZnet Co., Ltd |
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W6100 датащи(HTML) 18 Page - WIZnet Co., Ltd |
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18 / 149 page  W6100 – Hardwired Dual TCP/IP Stack Controller 18/149 In Figure 3, W6100 consists the below blocks. - 1 x Common Register Block, 7 x Reserved Block - 8 x SOCKET n Register Block - 8 x SOCKET n TX Buffer Block - 8 x SOCKET n RX Buffer Block These blocks are classified by block select 5bits. Each block is accessed with 16 bits offset address. SOCKET n TX Buffer Blocks (0≤n≤7) are initially allocated to 2KB each in 16KB TX memory. And each Block can be reallocated to 0, 1, 2, 4, 8, or 16KB through Sn_TX_BSR(4.2.23). The total allocated size of SOCKET n TX Buffer Blocks must not exceed 16KB. SOCKET n RX Buffer Blocks (0≤n≤7) are also initially allocated to 2KB each in 16KB RX memory. And each SOCKET n RX Buffer Block is reallocated in 0, 1, 2, 4, 8 or 16KB through Sn_RX_BSR(4.2.27). The total Size of allocated SOCKET n RX Buffer Block must not exceed 16KB. |
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