CS47L24 datasheet(37/256 Pages) CIRRUS

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CS47L24

Rev 4.1

ADDRESS

BIT

LABEL

DEFAULT

DESCRIPTION

Control

14:13

IN1_OSR [1:0]

Input Path 1 DMIC Oversample Rate

Controls the DMICCLK1 frequency:

00 = 1.536MHz

01 = 3.072MHz

10 = 6.144MHz

11 = 768kHz

When IN1_OSR=11, the Input Path

sample rate (for all input paths) must be in

the range 8kHz to 16kHz.

12:11

IN1_DMIC_SUP

[1:0]

Input Path 1 DMIC Reference Select

(Sets the DMICDAT1 and DMICCLK1

logic levels)

00 = MICVDD

01 = MICBIAS1

10 = MICBIAS2

11 = Reserved

R786

(0312h)

DMIC1L

Control

5:0

IN1L_DMIC_DLY

[5:0]

00h

Input Path 1 (Left) Digital Delay

LSB = 1 sample, Range is 0 to 63.

(Sample rate is controlled by IN1_OSR.)

R788

(0314h)

IN1R

Control

IN1R_HPF

Input Path 1 (Right) HPF Enable

0 = Disabled

1 = Enabled

R790

(0316h)

DMIC1R

Control

5:0

IN1R_DMIC_DLY

[5:0]

00h

Input Path 1 (Right) Digital Delay

LSB = 1 sample, Range is 0 to 63.

(Sample rate is controlled by IN1_OSR.)

R792

(0318h)

IN2L

Control

IN2L_HPF

Input Path 2 (Left) HPF Enable

0 = Disabled

1 = Enabled

14:13

IN2_OSR [1:0]

Input Path 2 DMIC Oversample Rate

Controls the DMICCLK2 frequency:

00 = 1.536MHz

01 = 3.072MHz

10 = 6.144MHz

11 = 768kHz

When IN2_OSR=11, the Input Path

sample rate (for all input paths) must be in

the range 8kHz to 16kHz.

12:11

IN2_DMIC_SUP

[1:0]

Input Path 2 DMIC Reference Select

(Sets the DMICDAT2 and DMICCLK2

logic levels)

00 = MICVDD

01 = MICBIAS1

10 = MICBIAS2

11 = Reserved

R794

(031Ah)

DMIC2L

Control

5:0

IN2L_DMIC_DLY

[5:0]

00h

Input Path 2 (Left) Digital Delay

LSB = 1 sample, Range is 0 to 63.

(Sample rate is controlled by IN2_OSR.)

R796

(031Ch)

IN2R

Control

IN2R_HPF

Input Path 2 (Right) HPF Enable

0 = Disabled

1 = Enabled

R798

(031Eh)

DMIC2R

Control

5:0

IN2R_DMIC_DLY

[5:0]

00h

Input Path 2 (Right) Digital Delay

LSB = 1 sample, Range is 0 to 63.

(Sample rate is controlled by IN2_OSR.)

Table 3 Input Signal Path Configuration

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