CS47L24 datasheet(32/256 Pages) CIRRUS

32 / 256 page

CS47L24

Rev 4.1

OTHER FEATURES

The CS47L24 incorporates two

1kHz tone generators which can be used for ‘beep’ functions through any of the audio

signal paths. The phase relationship between the two generators is configurable, providing flexibility in creating

differential signals, or for test scenarios.

A white no

ise generator is provided, which can be routed within the digital core. The noise generator can provide ‘comfort

noise’ in cases where silence (digital mute) is not desirable.

Two Pulse Width Modulation (PWM) signal generators are incorporated. The duty cycle of each PWM signal can be

modulated by an audio source, or can be set to a fixed value using a control register setting. The PWM signal generators

can be output directly on a GPIO pin.

The CS47L24 provides 2 GPIO pins, supporting selectable input/output functions for interfacing, detection of external

hardware, and to provide logic outputs to other devices. Comprehensive Interrupt (IRQ) functionality is also provided for

monitoring internal and external event conditions.

A signal generator for controlling haptics devices is included, compatible with both Eccentric Rotating Mass (ERM) and

Linear Resonant Actuator (LRA) haptic devices. The haptics signal generator is highly configurable, and can execute

programmable drive event profiles, including reverse drive control. An external vibe actuator can be driven directly by the

Class D speaker output.

The CS47L24 is powered from 1.8V and 1.2V external supplies. A separate supply (4.2V) is typically required for the

Class D speaker driver. An integrated Charge Pump circuit generates positive and negative supply rails for the

headphone drivers. Two MICBIAS regulators support powering and switching of external digital microphones.

System clocking can be derived from the MCLK1 or MCLK2 input pins. Alternatively, the audio interfaces (configured in

Slave mode), can be used to provide a clock reference. Two integrated Frequency Locked Loop (FLL) circuits provide

support for a wide range of clocking configurations, including the use of a 32kHz input clock reference.

CS47L24 датащи(PDF) 32 Page - Cirrus Logic