CS47L24 datasheet(49/256 Pages) CIRRUS

49 / 256 page

CS47L24

Rev 4.1

DIGITAL CORE OUTPUT MIXERS

The digital core comprises multiple output paths. The output paths associated with AIF1, AIF2 and AIF3 are illustrated in

Figure 15. The output paths associated with OUT1 and OUT4L are illustrated in Figure 16. (Note that OUT2, OUT3, and

OUT4R are not implemented on this device.)

A 4-input mixer is associated with each output. The 4 input sources are selectable in each case, and independent volume

control is provided for each path.

The AIF1, AIF2 and AIF3 output mixer control registers (see Figure 15) are located at register addresses R1792 (700h)

through to R1935 (78Fh). The OUT1 and OUT4L output mixer control registers (see Figure 16) are located at addresses

R1664 (680h) through to R1719 (6BFh).

The full list of digital mixer control registers is provided in the “Register Map” section (Register R1600 through to R3000).

Generic register definitions are provided in Table 7.

The *_SRCn registers select the input source(s) for the respective mixers. Note that the selected input source(s) must be

configured for the same sample rate as the mixer to which they are connected. Sample rate conversion functions are

available to support flexible interconnectivity -

see “Asynchronous Sample Rate Converter (ASRC)” and “Isochronous

Sample Rate Converter (ISRC)

”.

The sample rate for the output signal paths is configured using the applicable OUT_RATE, or AIFn_RATE register - see

Table 21. Note that sample rate conversion is required when routing the output signal paths to any signal chain that is

asynchronous and/or configured for a different sample rate.

The CS47L24 performs automatic checks to confirm that the SYSCLK frequency is high enough to support the output

mixer paths. If an attempt is made to enable an output mixer path, and there are insufficient SYSCLK cycles to support it,

then the attempt will be unsuccessful. (Note that any signal paths that are already active will not be affected under these

circumstances.)

The Underclocked Error condition can be monitored using the GPIO and/or Interrupt functions. See “General Purpose

Input / Output

” and “Interrupts” for further details.

The status bits in Registers R1600 to R3000 indicate the status of each of the digital mixers. If an Underclocked Error

condition occurs, then these bits provide readback of which mixer(s) have been successfully enabled.

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